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path: root/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
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* Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUIAna Pazos2019-01-251-64/+50
* [RISCV] Custom-legalise 32-bit variable shifts on RV64Alex Bradbury2019-01-251-40/+40
* [RISCV] Add codegen support for RV64AAlex Bradbury2019-01-171-0/+712
* [RISCV][NFC] Add CHECK lines for atomic operations on RV64IAlex Bradbury2019-01-111-0/+522
* [RISCV] Implement codegen for cmpxchg on RV32IAAlex Bradbury2018-11-291-0/+769
* [RISCV] Regenerate several tests now enableMultipleCopyHints is enabled by de...Alex Bradbury2018-10-051-21/+21
* [RISCV] Codegen support for atomic operations on RV32IAlex Bradbury2018-06-131-0/+720
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