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path: root/llvm/test/CodeGen/R600/vselect.ll
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* R600 -> AMDGPU renameTom Stellard2015-06-131-77/+0
| | | | llvm-svn: 239657
* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-02-271-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
* R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT testsMarek Olsak2015-02-031-30/+30
| | | | llvm-svn: 228040
* R600/SI: Enable all tests that pass on VI without changesMarek Olsak2015-01-271-0/+1
| | | | llvm-svn: 227214
* R600/SI: Add a stub GCNTargetMachineTom Stellard2015-01-061-1/+1
| | | | | | | | | | | | This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. llvm-svn: 225277
* R600/SI: Change all instruction assembly names to lowercase.Tom Stellard2014-11-051-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matches the format produced by the AMD proprietary driver. //==================================================================// // Shell script for converting .ll test cases: (Pass the .ll files you want to convert to this script as arguments). //==================================================================// ; This was necessary on my system so that A-Z in sed would match only ; upper case. I'm not sure why. export LC_ALL='C' TEST_FILES="$*" MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r` for f in $TEST_FILES; do # Check that there are SI tests: grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f if [ $? -eq 0 ]; then for match in $MATCHES; do sed -i -e "s/\([ :]$match\)/\L\1/" $f done # Try to get check lines with partial instruction names sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f fi done sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll //==================================================================// // Shell script for converting .td files (run this last) //==================================================================// export LC_ALL='C' sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td llvm-svn: 221350
* R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol ↵Tom Stellard2014-10-011-7/+7
| | | | | | table llvm-svn: 218776
* R600/SI: Use -verify-machineinstrs for most testsTom Stellard2013-10-101-1/+1
| | | | | | | | | | We can't enable the verifier for tests with SI_IF and SI_ELSE, because these instructions are always followed by a COPY which copies their result to the next basic block. This violates the machine verifier's rule that non-terminators can not folow terminators. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 192366
* R600: Fix handling of NAN in comparison instructionsTom Stellard2013-09-281-2/+2
| | | | | | | | We were completely ignoring the unorder/ordered attributes of condition codes and also incorrectly lowering seto and setuo. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 191603
* R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune2013-09-041-12/+12
| | | | llvm-svn: 189980
* Revert "R600: Non vector only instruction can be scheduled on trans unit"Tom Stellard2013-07-311-12/+12
| | | | | | This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6. llvm-svn: 187526
* R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune2013-07-311-12/+12
| | | | llvm-svn: 187514
* R600/SI: Fix crash with VSELECTTom Stellard2013-07-181-0/+15
| | | | | | https://bugs.freedesktop.org/show_bug.cgi?id=66175 llvm-svn: 186616
* R600: Expand VSELECT for all typesTom Stellard2013-07-181-0/+30
| | | | llvm-svn: 186613
* R600: Add v2i32 test for vselectAaron Watry2013-06-251-6/+20
| | | | | | | | | | | | | Note: Only adding test for evergreen, not SI yet. When I attempted to expand vselect for SI, I got the following: llc: /home/awatry/src/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:522: llvm::SDValue llvm::DAGTypeLegalizer::PromoteIntRes_SETCC(llvm::SDNode*): Assertion `SVT.isVector() == N->getOperand(0).getValueType().isVector() && "Vector compare must return a vector result!"' failed. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 184847
* R600: use capital letter for PV channelVincent Lejeune2013-06-031-4/+4
| | | | llvm-svn: 183107
* R600: Use bottom up scheduling algorithmVincent Lejeune2013-05-171-2/+2
| | | | llvm-svn: 182129
* R600: Expand vselect for v4i32 and v2i32Tom Stellard2013-05-101-0/+17
v2: Add vselect v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. llvm-svn: 181576
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