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path: root/llvm/test/CodeGen/R600/setcc.ll
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* R600 -> AMDGPU renameTom Stellard2015-06-131-377/+0
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-6/+6
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-7/+7
* R600/SI: Add a stub GCNTargetMachineTom Stellard2015-01-061-2/+2
* R600/SI: Use unordered equal instructionsMatt Arsenault2014-12-111-5/+2
* R600/SI: Make more unordered comparisons legalMatt Arsenault2014-12-111-16/+11
* R600/SI: Use unordered not equal instructionsMatt Arsenault2014-12-111-5/+2
* R600/SI: Remove i1 pseudo VALU opsMatt Arsenault2014-12-031-22/+20
* R600/SI: Fix assertion on sign extend of 3 vectorsMatt Arsenault2014-11-281-2/+47
* R600/SI: Change all instruction assembly names to lowercase.Tom Stellard2014-11-051-48/+48
* R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol ...Tom Stellard2014-10-011-26/+26
* R600/SI: Use VALU instructions for i1 opsTom Stellard2014-05-151-6/+18
* R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errorsTom Stellard2014-04-291-1/+1
* R600/SI: Fixing handling of condition codesTom Stellard2013-11-221-9/+314
* R600: Set scheduling preference to Sched::SourceTom Stellard2013-08-121-1/+1
* R600: Add 64-bit float load/store supportTom Stellard2013-08-011-13/+10
* R600: Add v2i32 test for setcc on evergreenAaron Watry2013-06-251-3/+22
* R600: Reorganize lit tests and document how they should be organizedTom Stellard2013-04-191-0/+12
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