bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	[PowerPC] Clear the sideeffect bit for those instructions that didn't have ↵	QingShan Zhang	2019-10-30	1	-4/+43
\| \| \| \| \| \| \| \| \| \| \| \|	the match pattern If the instruction have match pattern, llvm-tblgen will infer the sideeffect bit from the match pattern and it works well. If not, the tblgen will set it as true that hurt the scheduling. PowerPC has some instructions that didn't specify the match pattern(i.e. LXSD etc), which is manually selected post-ra according to the register pressure. We need to clear the sideeffect flag for these instructions. Differential Revision: https://reviews.llvm.org/D69232
*	[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook	QingShan Zhang	2019-07-02	1	-0/+19
	After implemented this hook, we will model the memory dependency in the scheduling dependency graph more precise, and will have more opportunity to reorder the load/stores, as they didn't have the dependency at some condition Differential Revision: https://reviews.llvm.org/D63804 llvm-svn: 364886