bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	[PowerPC] Use xxleqv to set all one vector IMM(-1).	Jinsong Ji	2019-08-15	1	-34/+34
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Summary: xxspltib/vspltisb are 3 cycle PM instructions, xxleqv is 2 cycle ALU instruction. We should use xxleqv to set all one vectors. Reviewers: hfinkel, nemanjai, steven.zhang Subscribers: hiraditya, kbarton, MaskRay, shchenz, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65529 llvm-svn: 369006
*	[PowerPC] Exploit the vector min/max instructions	Nemanja Ivanovic	2019-06-06	1	-16/+8
\| \| \| \| \| \| \| \| \| \|	Use the PPC vector min/max instructions for computing the corresponding operation as these should be faster than the compare/select sequences we currently emit. Differential revision: https://reviews.llvm.org/D47332 llvm-svn: 362759
*	[CGP] adjust target constraints for forming uaddo	Sanjay Patel	2019-02-03	1	-26/+24
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	There are 2 changes visible here: 1. There's no reason to limit this transform based on number of condition registers. That diff allows PPC to produce slightly better (dot-instructions should be generally good) code. Note: someone that cares about PPC codegen might want to look closer at that output because it seems like we could still improve this. 2. We (probably?) should not bother trying to form uaddo (or other overflow ops) when there's no target support for such an op. This goes beyond checking whether the op is expanded because both PPC and AArch64 show better codegen for standard types regardless of whether the op is legal/custom. llvm-svn: 353001
*	[PowerPC] add tests for saturating add; NFC	Sanjay Patel	2019-02-03	1	-0/+787
	This is copied from the existing test files for x86/AArch. llvm-svn: 352987