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path: root/llvm/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir
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* [PowerPC][NFC] Rename record instructions to use _rec suffix instead of oJinsong Ji2020-01-061-1/+1
* [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir...Guillaume Chatelet2019-09-111-1/+1
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-13/+13
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun2016-08-251-1/+0
* MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing itMatthias Braun2016-08-241-1/+0
* MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/...Matthias Braun2016-08-241-1/+0
* MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun2016-08-241-1/+0
* [MIR] Print on the given output instead of stderr.Quentin Colombet2016-07-131-1/+1
* PeepholeOptimizer: Make pass name match DEBUG_TYPEMatt Arsenault2016-07-081-1/+1
* [PPC64] Fix SUBFC8 Defs listKeno Fischer2016-06-011-0/+143
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