bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	[PowerPC][NFC] Fix typos in triples	Jinsong Ji	2019-05-14	1	-1/+1
\| \| \| \| \| \|	Found by bzEq (Kai Luo). llvm-svn: 360643
*	[DAGCombiner] Expand combining of FP logical ops to sign-setting FP ops	Nemanja Ivanovic	2018-10-09	1	-20/+4
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	We already do the following combines: (bitcast int (and (bitcast fp X to int), 0x7fff...) to fp) -> fabs X (bitcast int (xor (bitcast fp X to int), 0x8000...) to fp) -> fneg X When the target has "bit preserving fp logic". This patch just extends it to also combine: (bitcast int (or (bitcast fp X to int), 0x8000...) to fp) -> fneg (fabs X) As some targets have fnabs and even those that don't can efficiently lower both the fabs and the fneg. Differential revision: https://reviews.llvm.org/D44548 llvm-svn: 344093
*	[PowerPC][NFC] Commit nabs test case in preparation for committing D44548	Nemanja Ivanovic	2018-10-09	1	-0/+64
\| \| \| \| \| \| \|	This just adds the test case so that the different code gen is clearly visible when the DAG Combine lands. llvm-svn: 344091
*	[PowerPC] Implement hasBitPreservingFPLogic for types that can be supported	Nemanja Ivanovic	2018-10-09	1	-0/+126
	This is the PPC-specific non-controversial part of https://reviews.llvm.org/D44548 that simply enables this combine for PPC since PPC has these instructions. This commit will allow the target-independent portion to be truly target independent. llvm-svn: 344077