summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/PowerPC/f128-vecExtractNconv.ll
Commit message (Collapse)AuthorAgeFilesLines
* [PowerPC] Make no-PIC default to match GCC - LLVMStefan Pintilie2018-12-041-1/+1
| | | | | | | | Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
* Revert "[PowerPC] Make no-PIC default to match GCC - LLVM"Stefan Pintilie2018-11-161-1/+1
| | | | | | This reverts commit r347069 llvm-svn: 347076
* [PowerPC] Make no-PIC default to match GCC - LLVMStefan Pintilie2018-11-161-1/+1
| | | | | | | | Set -fno-PIC as the default option. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 347069
* [PowerPC] [NFC] Update __float128 testsStefan Pintilie2018-07-121-431/+432
| | | | | | | Add the two options -ppc-vsr-nums-as-vr and -ppc-asm-full-reg-names to the __float128 tests. Then modify the tests as required. llvm-svn: 336940
* [Power9]Legalize and emit code for HW/Byte vector extract and convert to QPLei Huang2018-05-281-3/+1108
| | | | | | | | | Implemente patterns to extract HWord and Byte vector elements and convert to quad-precision. Differential Revision: https://reviews.llvm.org/D46774 llvm-svn: 333377
* [Power9]Legalize and emit code for W vector extract and convert to QPLei Huang2018-05-231-0/+181
| | | | | | | | | Implemente patterns to extract [Un]signed Word vector element and convert to quad-precision. Differential Revision: https://reviews.llvm.org/D46536 llvm-svn: 333115
* [Power9]Legalize and emit code for DW vector extract and convert to QPLei Huang2018-05-231-0/+160
Implemente patterns to extract [Un]signed DWord vector element and convert to quad-precision. Differential Revision: https://reviews.llvm.org/D46333 llvm-svn: 333112
OpenPOWER on IntegriCloud