| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [PowerPC] Convert r+r instructions to r+i (pre and post RA) | Nemanja Ivanovic | 2017-12-15 | 1 | -28/+28 |
| * | [PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st. | Tony Jiang | 2017-11-20 | 1 | -36/+36 |
| * | [PowerPC] Pretty-print CR bits the way the binutils disassembler does | Nemanja Ivanovic | 2017-07-25 | 1 | -8/+12 |
| * | [PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16 | Nemanja Ivanovic | 2017-07-13 | 1 | -19/+21 |
| * | [PowerPC] Reduce register pressure by not materializing a constant just for u... | Lei Huang | 2017-07-10 | 1 | -2/+2 |
| * | P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org... | Zaara Syeda | 2017-05-24 | 1 | -108/+108 |
| * | [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE | Nemanja Ivanovic | 2017-05-02 | 1 | -26/+20 |
| * | [PPC] corrections in two testcases | Ehsan Amiri | 2016-12-16 | 1 | -14/+14 |
| * | [PowerPC] Improvements for BUILD_VECTOR Vol. 4 | Nemanja Ivanovic | 2016-12-06 | 1 | -0/+4858 |

