| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler | Stefan Pintilie | 2018-07-04 | 1 | -4/+0 |
| * | [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAP | Nemanja Ivanovic | 2018-01-12 | 1 | -0/+40 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -1138/+1138 |
| * | [PowerPC] eliminate unconditional branch to the next instruction | Hiroshi Inoue | 2017-09-27 | 1 | -24/+0 |
| * | Enhance synchscope representation | Konstantin Zhuravlyov | 2017-07-11 | 1 | -264/+264 |
| * | [PowerPC] fix potential verification errors on CFENCE8 | Hiroshi Inoue | 2017-06-15 | 1 | -10/+10 |
| * | [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync. | Tim Shen | 2017-05-16 | 1 | -8/+56 |
| * | [PPC] Add generated tests for all atomic operations | Tim Shen | 2017-03-23 | 1 | -0/+9546 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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