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* [PPC] Remove Darwin support from POWER backend.Kit Barton2018-08-281-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch issues an error message if Darwin ABI is attempted with the PPC backend. It also cleans up existing test cases, either converting the test to use an alternative triple or removing the test if the coverage is no longer needed. Updated Tests ------------- The majority of test cases were updated to use a different triple that does not include the Darwin ABI. Many tests were also updated to use FileCheck, in place of grep. Deleted Tests ------------- llvm/test/tools/dsymutil/PowerPC/sibling.test was originally added to test specific functionality of dsymutil using an object file created with an old version of llvm-gcc for a Powerbook G4. After a discussion with @JDevlieghere he suggested removing the test. llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll was converted from a PPC test to a SystemZ test, as the behavior is also reproducible there. All other tests that were deleted were specific to the darwin/ppc ABI and no longer necessary. Phabricator Review: https://reviews.llvm.org/D50988 llvm-svn: 340795
* Adding -verify-machineinstrs option to PowerPC testsEhsan Amiri2016-08-031-2/+2
| | | | | | | | | | | Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
* Don't run RAFast in the optimizing regalloc pipeline.Jakob Stoklund Olesen2012-06-081-1/+1
| | | | | | | | | | | The fast register allocator is not supposed to work in the optimizing pipeline. It doesn't make sense to compute live intervals, run full copy coalescing, and then run RAFast. Fast register allocation in the optimizing pipeline is better done by RABasic. llvm-svn: 158242
* Remove the local register allocator.Jakob Stoklund Olesen2010-06-151-1/+0
| | | | | | Please use the fast allocator instead. llvm-svn: 106051
* Only use clairvoyance when defining a register, and then only if it has one use.Jakob Stoklund Olesen2010-05-171-9/+5
| | | | | | This makes allocation independent on the ordering of use-def chains. llvm-svn: 103935
* Take allocation hints from copy instructions to/from physregs.Jakob Stoklund Olesen2010-05-131-2/+2
| | | | | | This causes way more identity copies to be generated, ripe for coalescing. llvm-svn: 103686
* Enable a bunch more -regalloc=fast testsJakob Stoklund Olesen2010-05-121-4/+10
| | | | llvm-svn: 103531
* Adjust register numbers in tests to compensate for theDale Johannesen2010-02-161-2/+2
| | | | | | new lack of R2. llvm-svn: 96407
* Reapply 95050 with a tweak to check the register class.Dale Johannesen2010-02-031-2/+2
| | | | llvm-svn: 95183
* Test revert 95050; there's a good chance it's causingDale Johannesen2010-02-021-2/+2
| | | | | | buildbot failure. llvm-svn: 95103
* Make local RA smarter about reusing input register of a copyDale Johannesen2010-02-021-2/+2
| | | | | | | as output. Needed for (functional) correctness in inline asm, and should be generally beneficial. 7361612. llvm-svn: 95050
* Do better with physical reg operands (typically, from inline asm)Dale Johannesen2009-12-161-2/+2
| | | | | | | | | | | | | | | | | | in local register allocator. If a reg-reg copy has a phys reg input and a virt reg output, and this is the last use of the phys reg, assign the phys reg to the virt reg. If a reg-reg copy has a phys reg output and we need to reload its spilled input, reload it directly into the phys reg than passing it through another reg. Following 76208, there is sometimes no dependency between the def of a phys reg and its use; this creates a window where that phys reg can be used for spilling (this is true in linear scan also). This is bad and needs to be fixed a better way, although 76208 works too well in practice to be reverted. However, there should normally be no spilling within inline asm blocks. The patch here goes a long way towards making this actually be true. llvm-svn: 91485
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-4/+4
| | | | llvm-svn: 81293
* Fix PR3149. If an early clobber def is a physical register and it is tied to ↵Evan Cheng2008-12-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this. 172 %ECX<def> = MOV32rr %reg1039<kill> 180 INLINEASM <es:subl $5,$1 sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9, %EAX<kill>, 36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0 188 %EAX<def> = MOV32rr %EAX<kill> 196 %ECX<def> = MOV32rr %ECX<kill> 204 %ECX<def> = MOV32rr %ECX<kill> 212 %EAX<def> = MOV32rr %EAX<kill> 220 %EAX<def> = MOV32rr %EAX 228 %reg1039<def> = MOV32rr %ECX<kill> The early clobber operand ties ECX input to the ECX def. The live interval of ECX is represented as this: %reg20,inf = [46,47:1)[174,230:0) 0@174-(230) 1@46-(47) The right way to represent this is something like %reg20,inf = [46,47:2)[174,182:1)[181:230:0) 0@174-(182) 1@181-230 @2@46-(47) Of course that won't work since that means overlapping live ranges defined by two val#. The workaround for now is to add a bit to val# which says the val# is redefined by a early clobber def somewhere. This prevents the move at 228 from being optimized away by SimpleRegisterCoalescing::AdjustCopiesBackFrom. llvm-svn: 61259
* Remove SelectionDag early allocation of registersDale Johannesen2008-09-241-2/+5
| | | | | | | for earlyclobbers. Teach Local RA about earlyclobber, and add some tests for it. llvm-svn: 56592
* testcase for PR1357Chris Lattner2007-04-301-0/+27
llvm-svn: 36598
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