Commit message (Expand) | Author | Age | Files | Lines | |
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* | [mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC | Simon Atanasyan | 2019-07-09 | 1 | -2/+2 |
* | [mips] Extend range of register indexes accepted by cfcmsa/ctcmsa | Simon Atanasyan | 2019-06-01 | 1 | -0/+18 |
* | [mips][msa] copyPhysReg() should not set RegState::Define on result of CTCMSA. | Daniel Sanders | 2016-06-14 | 1 | -2/+2 |
* | [mips][msa] Build all the tests in little and big endian modes and correct an... | Daniel Sanders | 2013-11-15 | 1 | -0/+1 |
* | [mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal e... | Daniel Sanders | 2013-09-27 | 1 | -1/+1 |
* | [mips][msa] Added cfcmsa, and ctcmsa | Daniel Sanders | 2013-08-28 | 1 | -0/+167 |