summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Mips/frame-address.ll
Commit message (Collapse)AuthorAgeFilesLines
* [Mips] Always save RA when disabling frame pointer eliminationSimon Atanasyan2019-10-071-8/+17
| | | | | | | | | | | | This ensures that frame-based unwinding will continue to work when calling a noreturn function; there is not much use having the caller's frame pointer saved if you don't also have the caller's program counter. Patch by James Clarke. Differential Revision: https://reviews.llvm.org/D68542 llvm-svn: 373907
* Add more addFrameMove test coverage.Rafael Espindola2013-05-161-1/+6
| | | | llvm-svn: 182011
* [mips] Print move instructions.Akira Hatanaka2013-03-041-1/+1
| | | | | | "move $4, $5" is printed instead of "or $4, $5, $zero". llvm-svn: 176455
* This patch that sets the EmitAlias flag in td files Jack Carter2013-02-051-2/+2
| | | | | | | | | | | | | and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic llvm-svn: 174358
* [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copyAkira Hatanaka2012-12-201-1/+1
| | | | | | | | | | | physical register $r1 to $r0. GNU disassembler recognizes an "or" instruction as a "move", and this change makes the disassembled code easier to read. Original patch by Reed Kotler. llvm-svn: 170655
* Drop support for Mips1 and Mips2.Akira Hatanaka2011-09-091-1/+1
| | | | llvm-svn: 139405
* Test case for r132444.Akira Hatanaka2011-06-021-0/+12
llvm-svn: 132445
OpenPOWER on IntegriCloud