Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. | Daniel Sanders | 2015-10-15 | 1 | -1/+1 |
* | [opaque pointer type] Add textual IR support for explicit type parameter to t... | David Blaikie | 2015-04-16 | 1 | -3/+3 |
* | [opaque pointer type] Add textual IR support for explicit type parameter to g... | David Blaikie | 2015-03-13 | 1 | -3/+3 |
* | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie | 2015-02-27 | 1 | -3/+3 |
* | IR: add "cmpxchg weak" variant to support permitted failure. | Tim Northover | 2014-06-13 | 1 | -1/+2 |
* | IR: add a second ordering operand to cmpxhg for failure | Tim Northover | 2014-03-11 | 1 | -1/+1 |
* | Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f... | Stephen Lin | 2013-07-14 | 1 | -2/+2 |
* | Expand all atomic ops for mips16. | Reed Kotler | 2012-10-29 | 1 | -0/+40 |