bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	[mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes.	Vasileios Kalintiris	2015-11-06	1	-32/+0
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Summary: Without these patterns we would generate a complete LL/SC sequence. This would be problematic for memory regions marked as WRITE-only or READ-only, as the instructions LL/SC would read/write to the protected memory regions correspondingly. Reviewers: dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14397 llvm-svn: 252293
*	[mips] wrong opcode for ll/sc instructions on mipsr6 when -integrated-as is used	Zoran Jovanovic	2015-10-29	1	-0/+32
	Summary: This commit resolves wrong opcodes for ll and sc instructions for r6 architecutres, which were generated in method MipsTargetLowering::emitAtomicBinary. Author: Jelena.Losic Reviewers: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13593 llvm-svn: 251629