summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Mips/Fast-ISel/rem1.ll
Commit message (Collapse)AuthorAgeFilesLines
* Re-commit: [mips][fastisel] Handle 0-4 arguments without SelectionDAG.Daniel Sanders2016-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | Summary: Implements fastLowerArguments() to avoid the need to fall back on SelectionDAG for 0-4 argument functions that don't do tricky things like passing double in a pair of i32's. This allows us to move all except one test to -fast-isel-abort=3. The remaining one has function prototypes of the form 'i32 (i32, double, double)' which requires floats to be passed in GPR's. The previous commit had an uninitialized variable that caused the incoming argument region to have undefined size. This has been fixed. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: https://reviews.llvm.org/D22680 llvm-svn: 277136
* Revert r276982 and r276984: [mips][fastisel] Handle 0-4 arguments without ↵Daniel Sanders2016-07-281-2/+2
| | | | | | | | | SelectionDAG It seems that the stack offset in callabi.ll varies between machines. I'll look into it. llvm-svn: 276989
* [mips][fastisel] Handle 0-4 arguments without SelectionDAG.Daniel Sanders2016-07-281-2/+2
| | | | | | | | | | | | | | | | | | | Summary: Implements fastLowerArguments() to avoid the need to fall back on SelectionDAG for 0-4 argument functions that don't do tricky things like passing double in a pair of i32's. This allows us to move all except one test to -fast-isel-abort=3. The remaining one has function prototypes of the form 'i32 (i32, double, double)' which requires floats to be passed in GPR's. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: https://reviews.llvm.org/D22680 llvm-svn: 276982
* fix CHECK_DAG -> CHECK-DAGSanjay Patel2016-03-281-2/+2
| | | | llvm-svn: 264673
* [mips][FastISel] Remove hidden mips-fast-isel option.Vasileios Kalintiris2015-07-301-2/+2
| | | | | | | | | | | | | | | Summary: This hidden option would disable code generation through FastISel by default. It was removed from the available options and from the Fast-ISel tests that required it in order to run the tests. Reviewers: dsanders Subscribers: qcolombet, llvm-commits Differential Revision: http://reviews.llvm.org/D11610 llvm-svn: 243638
* [mips][FastISel] Implement srem/urem and sdiv/udiv instructions.Vasileios Kalintiris2015-06-011-0/+56
Summary: Implement the LLVM assembly urem/srem and sdiv/udiv instructions in MIPS FastISel. Based on a patch by Reed Kotler. Test Plan: srem1.ll div1.ll test-suite at O0/O2 for mips32 r1/r2 Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7028 llvm-svn: 238757
OpenPOWER on IntegriCloud