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* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-02-271-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
* Replace obsolete -mattr=n64 command line option with -target-abi=n64. No ↵Vladimir Medic2015-02-261-1/+1
| | | | | | functional changes. llvm-svn: 230628
* [mips][mips64r6] Improve tests affected by the changes to multiplies and dividesDaniel Sanders2014-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MIPS32r6/MIPS64r6 support has not been added yet. inlineasm-cnstrnt-reg.ll: Explicitly specify the CPU since it will not work on MIPS32r6/MIPS64r6 when -integrated-as is the default. We can't change the mnemonic since the LO register is an implicit def of mtlo and MIPS32r6/MIPS64r6 has no instructions that use LO. 2008-08-01-AsmInline.ll: Explicitly specify the CPU since MIPS32r6/MIPS64r6 will correctly emit different code and this is a regression test. mips64instrs.ll and mips64muldiv.ll Check registers and the way the multiply is used in m1 divrem.ll Check registers and use multiple filecheck prefixes to limit redundancy Reviewers: vmedic, jkolek, zoran.jovanovic, matheusalmeida Reviewed By: matheusalmeida Subscribers: matheusalmeida Differential Revision: http://reviews.llvm.org/D3894 llvm-svn: 210656
* [mips] Properly parse registers that appear in inline-asm constraints.Akira Hatanaka2013-08-141-0/+18
| | | | llvm-svn: 188336
* Have getRegForInlineAsmConstraint return the correct register class when targetAkira Hatanaka2012-01-041-0/+38
| | | | | | is Mips64. llvm-svn: 147516
* Fix test cases to use FileCheck.Akira Hatanaka2011-12-021-11/+9
| | | | llvm-svn: 145716
* Correct bogus module triple specifications.Duncan Sands2010-08-301-1/+1
| | | | llvm-svn: 112469
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-1/+1
| | | | llvm-svn: 81293
* Remove obsolete -f flags.Dan Gohman2009-08-251-1/+1
| | | | llvm-svn: 79992
* Turn on LegalizeTypes, the new type legalizationDuncan Sands2008-10-271-1/+1
| | | | | | | codegen infrastructure, by default. Please report any breakage to the mailing lists. llvm-svn: 58232
* Batch 5 of Mips CodeGen testsBruno Cardoso Lopes2008-08-081-0/+17
llvm-svn: 54510
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