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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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MIR
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PowerPC
Commit message (
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Author
Age
Files
Lines
*
[PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC
Jinsong Ji
2019-09-13
4
-444
/
+0
*
[PowerPC][MCP][NFC] Pre-commit test cases for https://reviews.llvm.org/D65267
Kai Luo
2019-09-12
1
-0
/
+281
*
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir...
Guillaume Chatelet
2019-09-11
2
-3
/
+3
*
[PowerPC][Peephole] Check if `extsw`'s second operand is a virtual register
Kai Luo
2019-08-02
1
-2
/
+3
*
[PowerPC][NFC] Precommit a test case where ppc-mi-peepholes miscompiles extswsli
Kai Luo
2019-07-22
1
-0
/
+66
*
[Power9] Allow gpr callee saved spills in prologue to vectors registers
Zaara Syeda
2018-11-09
1
-0
/
+62
*
[if-converter] Handle BBs that terminate in ret during diamond conversion
Krzysztof Parzyszek
2018-04-19
1
-0
/
+34
*
Followup on Proposal to move MIR physical register namespace to '$' sigil.
Puyan Lotfi
2018-01-31
1
-6
/
+6
*
MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.
Matthias Braun
2016-08-24
1
-1
/
+0
*
llc: Add support for -run-pass none
Matthias Braun
2016-07-16
1
-1
/
+1
*
[MIR] Print on the given output instead of stderr.
Quentin Colombet
2016-07-13
1
-1
/
+1
*
When printing MIR, output to errs() rather than outs().
Justin Lebar
2016-02-19
1
-1
/
+1
*
Fix PR 24724 - The implicit register verifier shouldn't assume certain operand
Alex Lorenz
2015-09-10
2
-0
/
+47