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path: root/llvm/test/CodeGen/MIR/Generic
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* [llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands.Puyan Lotfi2019-12-161-0/+14
* [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir...Guillaume Chatelet2019-09-111-4/+4
* Rename ExpandISelPseudo->FinalizeISel, delay register reservationMatt Arsenault2019-06-191-6/+6
* [lit] Delete empty lines at the end of lit.local.cfg NFCFangrui Song2019-06-171-1/+0
* [codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_RELReid Kleckner2018-10-011-0/+3
* [MIRParser] Add parser support for 'true' and 'false' i1s.Amara Emerson2018-06-051-0/+11
* [MIR] Add support for MachineFrameInfo::LocalFrameSizeFrancis Visoiu Mistrih2018-04-061-0/+2
* [RegAllocFast] Add the proper initialize method to use the .mir infrastructureQuentin Colombet2017-07-071-0/+2
* Remove redundant copy in recurrencesTaewook Oh2017-06-291-1/+2
* Vivek Pandya2017-06-061-0/+5
* CodeGen: Refactor MIR parsingMatthias Braun2017-06-061-13/+0
* [RABasic] Properly initialize the passQuentin Colombet2017-06-021-0/+1
* TargetMachine: Indicate whether machine verifier passes.Matthias Braun2017-05-311-2/+2
* Move machine-cse-physreg.mir to test/CodeGen/ThumbKrzysztof Parzyszek2017-05-241-35/+0
* MachineCSE: Respect interblock physreg livenessMikael Holmen2017-05-241-0/+35
* MIParser/MIRPrinter: Compute block successors if not explicitely specifiedMatthias Braun2017-05-051-28/+0
* MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFCMatthias Braun2017-05-011-1/+0
* MIR: Allow parsing of empty machine functionsJustin Bogner2017-04-118-41/+17
* Moving the test to x86 because other architectures do not suport regcall call...Oren Ben Simhon2017-03-191-30/+0
* [MIR] Support Customed Register Mask and CSRsOren Ben Simhon2017-03-191-0/+30
* MIRTests: Remove unnecessary 2>&1 redirectionMatthias Braun2017-02-223-3/+3
* [MIRPrinter] XFAIL test for powerpcGeoff Berry2016-11-181-0/+2
* [MIRPrinter] Print raw branch probabilities as expected by MIRParserGeoff Berry2016-11-181-0/+26
* RegAllocGreedy: Properly initialize this pass, so that -run-pass will workTom Stellard2016-11-141-0/+11
* MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing itMatthias Braun2016-08-241-5/+0
* MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/...Matthias Braun2016-08-241-3/+0
* MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun2016-08-242-7/+2
* [GlobalISel] Add Selected MachineFunction property.Ahmed Bougacha2016-08-021-0/+3
* [GlobalISel] Add RegBankSelected MachineFunction property.Ahmed Bougacha2016-08-021-0/+3
* [GlobalISel] Add Legalized MachineFunction property.Ahmed Bougacha2016-08-021-0/+34
* llc: Add support for -run-pass noneMatthias Braun2016-07-1619-19/+19
* [MIR] Print on the given output instead of stderr.Quentin Colombet2016-07-138-11/+11
* PeepholeOptimizer: Make pass name match DEBUG_TYPEMatt Arsenault2016-07-081-6/+6
* [llc] Add support for several run-pass options.Quentin Colombet2016-06-101-0/+20
* [llc] Remove exit-on-error flag from MIR tests (PR27770)Diana Picus2016-06-095-5/+5
* [llc] New diagnostic handlerRenato Golin2016-05-165-5/+5
* Revert "[llc] New diagnostic handler"Renato Golin2016-05-145-5/+5
* [llc] New diagnostic handlerRenato Golin2016-05-145-5/+5
* Revert "[llc] New diagnostic handler"Renato Golin2016-05-135-5/+5
* [llc] New diagnostic handlerRenato Golin2016-05-135-5/+5
* When printing MIR, output to errs() rather than outs().Justin Lebar2016-02-197-7/+7
* MIR Serialization: Change MIR syntax - use custom syntax for MBBs.Alex Lorenz2015-08-1316-129/+93
* Move generic MIR tests in their own subdir, requires "native" as wellMehdi Amini2015-08-0421-0/+603
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