| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [Hexagon] Replace instruction definitions with auto-generated ones | Krzysztof Parzyszek | 2017-02-10 | 1 | -19/+19 |
| | | | | | llvm-svn: 294753 | ||||
| * | [Hexagon] Making intrinsic tests agnostic to register allocation. Narrowing ↵ | Colin LeMahieu | 2015-06-12 | 1 | -34/+29 |
| | | | | | | | intrinsic parameters to appropriate width. llvm-svn: 239634 | ||||
| * | [Hexagon] Adding vector intrinsics for alu32/alu and xtype/alu. | Colin LeMahieu | 2015-02-03 | 1 | -0/+66 |
| | | | | | llvm-svn: 227993 | ||||
| * | [Hexagon] Replacing old intrinsic tests with organized versions that match ↵ | Colin LeMahieu | 2015-01-28 | 1 | -0/+136 |
| the reference manual. llvm-svn: 227321 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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