| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [Hexagon] Avoid predicate copies to integer registers from store-locked | Krzysztof Parzyszek | 2018-05-14 | 3 | -7/+7 |
| | | | | | llvm-svn: 332260 | ||||
| * | [Hexagon] Add more lit tests | Krzysztof Parzyszek | 2018-03-26 | 2 | -0/+121 |
| | | | | | llvm-svn: 328561 | ||||
| * | [Hexagon] Add lit testcases for atomic intrinsics | Krzysztof Parzyszek | 2018-03-16 | 3 | -0/+177 |
| | | | | | | | Patch by Ben Craig. llvm-svn: 327737 | ||||
| * | [Hexagon] Fix operand-swapping PatFrag for atomic stores | Krzysztof Parzyszek | 2017-12-15 | 1 | -0/+68 |
| | | | | | | | | PatFrag now has the atomicity information stored as bit fields. They need to be copied to the new PatFrag. llvm-svn: 320855 | ||||
| * | [Hexagon] Add support for Hexagon V65 | Krzysztof Parzyszek | 2017-12-11 | 6 | -0/+463 |
| | | | | | llvm-svn: 320404 | ||||
| * | [Hexagon] Remove trailing spaces, NFC | Krzysztof Parzyszek | 2017-11-22 | 1 | -1/+1 |
| | | | | | llvm-svn: 318875 | ||||
| * | [Hexagon] New HVX target features. | Sumanth Gundapaneni | 2017-10-18 | 3 | -3/+3 |
| | | | | | | | | | | | | | | | | | | | | | | | This patch lets the llvm tools handle the new HVX target features that are added by frontend (clang). The target-features are of the form "hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX. "hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated. The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}. Eg: "+hvxv62" For the correct HVX code generation, the user must use the following target features. For 64B mode: "+hvxv62" "+hvx-length64b" For 128B mode: "+hvxv62" "+hvx-length128b" Clang picks a default length if none is specified. If for some reason, no hvx-length is specified to llvm, the compilation will bail out. There is a corresponding clang patch. Differential Revision: https://reviews.llvm.org/D38851 llvm-svn: 316101 | ||||
| * | [Hexagon] Add intrinsics for data cache operations | Krzysztof Parzyszek | 2017-07-14 | 1 | -9/+67 |
| | | | | | | | | | | | | | | This is the LLVM part, adding definitions for void @llvm.hexagon.Y2.dccleana(i8*) void @llvm.hexagon.Y2.dccleaninva(i8*) void @llvm.hexagon.Y2.dcinva(i8*) void @llvm.hexagon.Y2.dczeroa(i8*) void @llvm.hexagon.Y4.l2fetch(i8*, i32) void @llvm.hexagon.Y5.l2fetch(i8*, i64) The clang part will follow. llvm-svn: 308032 | ||||
| * | [Hexagon] Add intrinsics for masked vector stores | Krzysztof Parzyszek | 2017-02-22 | 2 | -0/+82 |
| | | | | | | | Patch by Harsha Jagasia. llvm-svn: 295879 | ||||
| * | [Hexagon] Replace instruction definitions with auto-generated ones | Krzysztof Parzyszek | 2017-02-10 | 12 | -643/+643 |
| | | | | | llvm-svn: 294753 | ||||
| * | [Hexagon] Enforce LLSC packetization rules | Krzysztof Parzyszek | 2016-08-19 | 1 | -0/+12 |
| | | | | | | | | | | Ensure that load locked and store conditional instructions are only packetized with ALU32 instructions. Patch by Ben Craig. llvm-svn: 279272 | ||||
| * | [Hexagon] Add support for __builtin_prefetch | Krzysztof Parzyszek | 2016-02-18 | 1 | -0/+13 |
| | | | | | llvm-svn: 261210 | ||||
| * | [Hexagon] Making intrinsic tests agnostic to register allocation. Narrowing ↵ | Colin LeMahieu | 2015-06-12 | 11 | -749/+777 |
| | | | | | | | intrinsic parameters to appropriate width. llvm-svn: 239634 | ||||
| * | [Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning out old intrinsic ↵ | Colin LeMahieu | 2015-02-03 | 3 | -2/+90 |
| | | | | | | | patterns and updating tests. llvm-svn: 228026 | ||||
| * | [Hexagon] Updating XTYPE/PRED intrinsics. | Colin LeMahieu | 2015-02-03 | 1 | -1/+154 |
| | | | | | llvm-svn: 228019 | ||||
| * | [Hexagon] Updating XTYPE/PERM intrinsics. | Colin LeMahieu | 2015-02-03 | 1 | -0/+206 |
| | | | | | llvm-svn: 228015 | ||||
| * | [Hexagon] Adding missing vector multiply instruction encodings. Converting ↵ | Colin LeMahieu | 2015-02-03 | 1 | -0/+390 |
| | | | | | | | multiply intrinsics and updating tests. llvm-svn: 228010 | ||||
| * | [Hexagon] Converting complex number intrinsics and adding tests. | Colin LeMahieu | 2015-02-03 | 1 | -0/+349 |
| | | | | | llvm-svn: 227995 | ||||
| * | [Hexagon] Adding vector intrinsics for alu32/alu and xtype/alu. | Colin LeMahieu | 2015-02-03 | 2 | -0/+533 |
| | | | | | llvm-svn: 227993 | ||||
| * | [Hexagon] Deleting old variants of intrinsics and adding missing tests. | Colin LeMahieu | 2015-01-29 | 3 | -10/+95 |
| | | | | | llvm-svn: 227474 | ||||
| * | [Hexagon] Adding CR intrinsic tests. | Colin LeMahieu | 2015-01-29 | 1 | -0/+76 |
| | | | | | llvm-svn: 227463 | ||||
| * | [Hexagon] Adding XTYPE/PRED intrinsic tests. Converting predicate types to ↵ | Colin LeMahieu | 2015-01-29 | 2 | -0/+255 |
| | | | | | | | i32 instead of i1. llvm-svn: 227457 | ||||
| * | [Hexagon] Updating several V5 intrinsics and adding FP tests. | Colin LeMahieu | 2015-01-28 | 2 | -0/+876 |
| | | | | | llvm-svn: 227379 | ||||
| * | [Hexagon] Adding XTYPE/MPY intrinsic tests and some missing multiply ↵ | Colin LeMahieu | 2015-01-28 | 1 | -0/+1135 |
| | | | | | | | instructions. llvm-svn: 227347 | ||||
| * | [Hexagon] Deleting a lot of old variants of intrinsics and updating references. | Colin LeMahieu | 2015-01-28 | 1 | -3/+3 |
| | | | | | llvm-svn: 227338 | ||||
| * | [Hexagon] Converting XTYPE/BIT intrinsic patterns and adding tests. | Colin LeMahieu | 2015-01-28 | 1 | -0/+329 |
| | | | | | llvm-svn: 227335 | ||||
| * | [Hexagon] Replacing XTYPE/SHIFT intrinsic patternss. Adding tests and ↵ | Colin LeMahieu | 2015-01-28 | 1 | -0/+635 |
| | | | | | | | missing instructions with tests. llvm-svn: 227330 | ||||
| * | [Hexagon] Replacing old intrinsic tests with organized versions that match ↵ | Colin LeMahieu | 2015-01-28 | 3 | -0/+265 |
| the reference manual. llvm-svn: 227321 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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