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path: root/llvm/test/CodeGen/Hexagon/autohvx/isel-concat-vectors-bool.ll
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* [Hexagon] Simplify CFG after atomic expansionKrzysztof Parzyszek2018-08-021-2/+4
| | | | | | | | | | This will remove suboptimal branching from the generated ll/sc loops. The extra simplification pass affects a lot of testcases, which have been modified to accommodate this change: either by modifying the test to become immune to the CFG simplification, or (less preferablt) by adding option -hexagon-initial-cfg-clenaup=0. llvm-svn: 338774
* [Hexagon] Run late copy propagation and dead code elimination passesKrzysztof Parzyszek2018-01-241-4/+5
| | | | llvm-svn: 323346
* [Hexagon] Implement basic vector operations on vectors vNi1Krzysztof Parzyszek2018-01-231-0/+20
In addition to that, make sure that there are no boolean vector types that are associated with multiple register classes. Specifically, remove v32i1 and v64i1 from integer register classes. These types will correspond to results of vector comparisons, and as such should belong to the vector predicate class. Having them in scalar registers as well makes legalization ambiguous. llvm-svn: 323229
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