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* [AVR] Fix codegen for rotate instructionsJim Lin2019-12-231-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch introduces the ROLBRd and RORBRd pseudo-instructions, which implemenent the "traditional" rotate operations; instead of the AVR rotate instructions that use the carry bit. The code is not optimized at all. Especially when dealing with loops of rotate instructions, this codegen should be improved some day. Related bug: 41358 <https://bugs.llvm.org/show_bug.cgi?id=41358> //Note//: This is my first submitted patch. Reviewers: dylanmckay, Jim Reviewed By: dylanmckay Subscribers: hiraditya, llvm-commits, dylanmckay, dsprenkels Tags: #llvm Patched by dsprenkels (Daan Sprenkels) Differential Revision: https://reviews.llvm.org/D60365
* [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-2/+2
| | | | | | | When generating code for a shift loop, check the shift amount against the literal value 0, not R0 llvm-svn: 304284
* [AVR] Implement non-constant bit rotationsDylan McKay2017-05-011-0/+55
This lets us do bit rotations of variable amount. llvm-svn: 301794
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