1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
|
; RUN: llc < %s -march=avr | FileCheck %s
; Bit rotation tests.
; CHECK-LABEL: rol8:
define i8 @rol8(i8 %val, i8 %amt) {
; CHECK: andi r22, 7
; CHECK-NEXT: cpi r22, 0
; CHECK-NEXT: breq LBB0_2
; CHECK-NEXT: LBB0_1:
; CHECK-NEXT: lsl r24
; CHECK-NEXT: adc r24, r1
; CHECK-NEXT: subi r22, 1
; CHECK-NEXT: brne LBB0_1
; CHECK-NEXT:LBB0_2:
; CHECK-NEXT: ret
%mod = urem i8 %amt, 8
%inv = sub i8 8, %mod
%parta = shl i8 %val, %mod
%partb = lshr i8 %val, %inv
%rotl = or i8 %parta, %partb
ret i8 %rotl
}
; CHECK-LABEL: ror8:
define i8 @ror8(i8 %val, i8 %amt) {
; CHECK: andi r22, 7
; CHECK-NEXT: cpi r22, 0
; CHECK-NEXT: breq LBB1_2
; CHECK-NEXT: LBB1_1:
; CHECK-NEXT: lsr r24
; CHECK-NEXT: ldi r0, 0
; CHECK-NEXT: ror r0
; CHECK-NEXT: or r24, r0
; CHECK-NEXT: subi r22, 1
; CHECK-NEXT: brne LBB1_1
; CHECK-NEXT:LBB1_2:
; CHECK-NEXT: ret
%mod = urem i8 %amt, 8
%inv = sub i8 8, %mod
%parta = lshr i8 %val, %mod
%partb = shl i8 %val, %inv
%rotr = or i8 %parta, %partb
ret i8 %rotr
}
|
