summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/AVR/pseudo
Commit message (Expand)AuthorAgeFilesLines
* [AVR] Fix incorrect source regclass of LDWRdPtrJim Lin2019-06-032-38/+3
* [AVR] Fix codegen bug in 16-bit loadsDylan McKay2019-01-202-4/+4
* Revert "[AVR] Fix codegen bug in 16-bit loads"Dylan McKay2019-01-202-4/+4
* [AVR] Fix codegen bug in 16-bit loadsDylan McKay2019-01-182-4/+4
* [AVR] Disallow the LDDWRdPtrQ instruction with Z as the destinationDylan McKay2018-11-052-8/+8
* [AVR] Redefine the 'LSL' instruction as an alias of 'ADD'Dylan McKay2018-09-013-3/+3
* [AVR] Define the ROL instruction as an alias of ADCDylan McKay2018-09-011-1/+1
* [AVR] Fix the testsuite after '%' changed to '$' in MIRDylan McKay2018-02-0838-108/+108
* [AVR] Elaborate LDWRdPtr into `ld r, X++; ld r+1, X`Dylan McKay2017-10-044-8/+8
* [AVR] Fix test errors due to tied operands not matchingDylan McKay2017-07-095-7/+7
* [AVR] Support the LDWRdPtr instruction with the same Src+Dst registerDylan McKay2017-04-253-35/+64
* MIRTests: Remove unnecessary 2>&1 redirectionMatthias Braun2017-02-2237-37/+37
* [AVR] Marm MIR test functions as tracking liveness informationDylan McKay2017-02-053-2/+5
* [AVR] Explicitly set the target in all CodeGen testsDylan McKay2016-12-103-3/+3
* [AVR] Use the register scavenger when expanding 'LDDW' instructionsDylan McKay2016-12-101-12/+13
* [AVR] Remove a set of redundant testsDylan McKay2016-12-094-88/+0
* [AVR] Add tests for a large number of pseudo instructionsDylan McKay2016-12-0926-4/+557
* [AVR] Add MIR tests for pseudo instruction expansionsDylan McKay2016-12-0813-0/+308
* [AVR] Add MIR tests for a few pseudo instructionsDylan McKay2016-12-083-0/+72
* [AVR] Move a pseudo expansion test into a folderDylan McKay2016-12-071-0/+33
OpenPOWER on IntegriCloud