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path: root/llvm/test/CodeGen/ARM/vstlane.ll
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* [ARM] Regenerate vector lane store testsSimon Pilgrim2019-11-191-98/+285
* [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).Kristof Beyls2017-06-281-3/+3
* [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]la...Jeroen Ketema2015-09-301-45/+45
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-39/+39
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-5/+5
* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-1/+1
* Revert "Tests: Be less dependent on a specific schedule/regalloc"Matthias Braun2013-10-111-13/+13
* Tests: Be less dependent on a specific schedule/regallocMatthias Braun2013-10-111-13/+13
* CriticalAntiDepBreaker is no longer needed for armv7 scheduling.Andrew Trick2013-09-251-1/+1
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-141-35/+35
* Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls2013-02-221-13/+13
* Also set addrmode6 alignment when align==size.Jakob Stoklund Olesen2011-10-271-1/+1
* Don't crash on variable insertelement on ARM. PR10258.Eli Friedman2011-10-241-0/+7
* Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).Nadav Rotem2011-05-111-4/+8
* Add patterns to use post-increment addressing for Neon VST1-lane instructions.Bob Wilson2011-02-251-0/+26
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-071-0/+38
* Add float patterns for Neon vld1-lane/dup and vst1-lane operations.Bob Wilson2010-12-101-0/+18
* Add codegen patterns for VST1-lane instructions. Radar 8599955.Bob Wilson2010-11-031-0/+57
* Support alignment for NEON vld-lane and vst-lane instructions.Bob Wilson2010-10-191-19/+29
* Add alignment arguments to all the NEON load/store intrinsics.Bob Wilson2010-08-271-42/+42
* Fix tests for Neon load/store intrinsics to match the i8* types expected byBob Wilson2010-04-201-18/+36
* Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.Bob Wilson2009-10-091-0/+28
* Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+28
* Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+28
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-1/+1
* Add support for generating code for vst{234}lane intrinsics.Bob Wilson2009-09-011-0/+113
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