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path: root/llvm/test/CodeGen/ARM/vpadd.ll
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* [ARM] Adjust how NEON shifts are loweredDavid Green2019-07-151-13/+34
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-31/+31
* [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).Kristof Beyls2017-06-281-11/+11
* ARM: make sure we use all entries in a vector before forming a vpaddl.Tim Northover2017-04-211-0/+9
* ARM: don't try to create an i8 -> i32 vpaddl.Tim Northover2017-04-211-0/+11
* [ARM] More aggressive matching for vpadd and vpaddl.Eli Friedman2017-01-111-16/+232
* [ARM] Implement isExtractSubvectorCheap.Eli Friedman2016-12-201-21/+32
* [ARM] Generate checks for shuffle tests using update_llc_test_checks.py.Eli Friedman2016-12-201-35/+130
* [ARM][AArch64] Turn on by default interleaved access loweringSilviu Baranga2015-09-011-1/+1
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-22/+22
* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-1/+1
* [ARM] When generating a vpaddl node the input lane type is not always the typ...Silviu Baranga2014-04-031-0/+11
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-141-16/+16
* Add an optimization that looks for a specific pair-wise add pattern and gener...Tanya Lattner2011-06-141-0/+14
* Merge a bunch of NEON tests into larger files so they run faster.Bob Wilson2009-10-091-0/+112
* Convert more NEON tests to use FileCheck.Bob Wilson2009-10-081-5/+9
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-1/+1
* Use new EVT::vAny type to combine Neon intrinsics for VPADD.Bob Wilson2009-08-111-8/+8
* Add support for ARM's Advanced SIMD (NEON) instruction set.Bob Wilson2009-06-221-0/+39
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