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path: root/llvm/test/CodeGen/ARM/vcvt_combine.ll
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* [CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih2017-11-301-1/+1
* ARM: stop asserting on weird <3 x Ty> vectors in ISelLowering.Tim Northover2016-03-171-0/+8
* [ARM] Simplify tests and make checks more rigid. NFC.Chad Rosier2015-10-061-67/+36
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-6/+6
* TBAA: remove !tbaa from testing cases if not used.Manman Ren2013-04-301-10/+6
* The Neon VCVT (between floating-point and fixed-point, Advanced SIMD) Chad Rosier2011-06-241-0/+99
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