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path: root/llvm/test/CodeGen/ARM/vcombine.ll
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* [SchedModel] Fix for read advance cycles with implicit pseudo operands.Jonas Paulsson2018-10-301-4/+4
* [DAGCombiner] use narrow load to avoid vector extractSanjay Patel2017-05-271-1/+3
* [ARM] Split 128-bit vectors in BUILD_VECTOR loweringEli Friedman2016-12-141-0/+18
* Introduce target hook for optimizing register copiesMatt Arsenault2015-09-241-21/+43
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-12/+12
* ARM: Implement big endian bit-conversion for NEON typeChristian Pirker2014-05-121-1/+1
* ARM big endian function argument passingChristian Pirker2014-05-081-13/+26
* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-1/+1
* ARM: force soft-float ABI for tests depending on it.Tim Northover2013-12-181-1/+1
* Add testcases for PR8411 (vget_low and vget_high implemented as shuffles).Bob Wilson2011-01-071-1/+37
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-1/+1
* Lower CONCAT_VECTOR during legalization instead of matching it during isel.Bob Wilson2009-08-031-0/+36
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