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path: root/llvm/test/CodeGen/ARM/misched-copy-arm.ll
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* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-3/+3
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-2/+2
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-3/+3
* CodeGen: Rename DEBUG_TYPE to match passnamesMatthias Braun2017-05-251-1/+1
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-2/+2
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-2/+2
* ARM & AArch64: make use of common cmpxchg idioms after expansionTim Northover2014-05-301-1/+1
* ARM: yet another round of ARM test clean upsSaleem Abdulrasool2014-04-031-1/+1
* TBAA: remove !tbaa from testing cases when they are not needed.Manman Ren2013-09-301-5/+1
* This test may have been sensitive to the ARM ABI...Andrew Trick2013-07-301-1/+1
* MI Sched fix: assert "Disconnected LRG within the scheduling region."Andrew Trick2013-07-301-1/+54
* MI Sched: eliminate local vreg copies.Andrew Trick2013-04-241-0/+30
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