| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [ARM] Add a register class for GPR pairs without SP and use it. NFCI | Mikhail Maltsev | 2019-10-16 | 1 | -1/+1 |
| * | RegUsageInfoCollector: Skip AMDGPU entry point functions | Matt Arsenault | 2019-07-05 | 1 | -0/+3 |
| * | [ARM] Add the non-MVE instructions in Arm v8.1-M. | Simon Tatham | 2019-06-11 | 1 | -1/+1 |
| * | Revert rL362953 and its followup rL362955. | Simon Tatham | 2019-06-10 | 1 | -1/+1 |
| * | [ARM] Add the non-MVE instructions in Arm v8.1-M. | Simon Tatham | 2019-06-10 | 1 | -1/+1 |
| * | [RegUsageInfoCollector] Don't mark as saved registers that don't have subregi... | Quentin Colombet | 2019-05-28 | 1 | -0/+15 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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