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path: root/llvm/test/CodeGen/ARM/atomic-ops-v8.ll
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* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-4/+4
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-311-16/+19
* Revert "CodeGen: Allow small copyable blocks to "break" the CFG."Kyle Butt2017-01-111-19/+16
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-101-16/+19
* ARM: Better codegen for 64-bit compares.Peter Collingbourne2016-03-211-48/+28
* [ARM] Emit clrex in the expanded cmpxchg fail block.Ahmed Bougacha2015-09-221-9/+29
* ARM: Thumb2 LDRD/STRD supports independent input/output regsMatthias Braun2015-06-031-6/+8
* Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs"Renato Golin2015-06-021-8/+6
* ARM: Thumb2 LDRD/STRD supports independent input/output regsMatthias Braun2015-06-011-6/+8
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-8/+8
* Improve handling of stack accesses in Thumb-1Renato Golin2015-02-251-1/+1
* IR: add "cmpxchg weak" variant to support permitted failure.Tim Northover2014-06-131-4/+8
* ARM big endian function argument passingChristian Pirker2014-05-081-36/+72
* ARM: tell LLVM about zext properties of ldrexb/ldrexhTim Northover2014-04-031-12/+10
* ARM: skip cmpxchg failure barrier if ordering is monotonic.Tim Northover2014-04-031-3/+4
* ARM: expand atomic ldrex/strex loops in IRTim Northover2014-04-031-191/+229
* IR: add a second ordering operand to cmpxhg for failureTim Northover2014-03-111-4/+4
* [ARM] Use the load-acquire/store-release instructions optimally in AArch32.Amara Emerson2013-09-261-0/+1344
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