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path: root/llvm/test/CodeGen/ARM/atomic-op.ll
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* [ARM] Emit clrex in the expanded cmpxchg fail block.Ahmed Bougacha2015-09-221-14/+32
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-4/+4
* ARM: allow misaligned local variables in Thumb1 mode.Tim Northover2014-10-141-0/+2
* Add a thread-model knob for lowering atomics on baremetal & single threaded s...Jonathan Roelofs2014-08-211-0/+113
* ARM: do not generate BLX instructions on Cortex-M CPUs.Tim Northover2014-08-061-1/+24
* IR: add "cmpxchg weak" variant to support permitted failure.Tim Northover2014-06-131-2/+4
* ARM: skip cmpxchg failure barrier if ordering is monotonic.Tim Northover2014-04-031-0/+37
* ARM: don't expand atomicrmw inline on Cortex-M0Tim Northover2013-10-251-0/+1
* LegalizeDAG: allow libcalls for max/min atomic operationsTim Northover2013-10-251-0/+24
* Fix a couple of typos in EmitAtomic.Jakob Stoklund Olesen2012-08-311-0/+10
* Fix a couple of copy-n-paste bugs. Noticed by George Russell!Chad Rosier2011-12-211-0/+58
* Fix a couple of copy-n-paste bugs. Noticed by George Russell.Evan Cheng2011-12-211-4/+26
* Convert more tests over to the new atomic instructions.Eli Friedman2011-09-261-33/+11
* Atomic pseudos don't use (as in read) CPSR. They clobber it.Jakob Stoklund Olesen2011-09-061-2/+2
* Fix the remaining atomic intrinsics to use the right register classes on Thumb2,Cameron Zwarich2011-05-271-0/+103
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