bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	[ARM] Emit clrex in the expanded cmpxchg fail block.	Ahmed Bougacha	2015-09-22	1	-14/+32
*	[opaque pointer type] Add textual IR support for explicit type parameter to l...	David Blaikie	2015-02-27	1	-4/+4
*	ARM: allow misaligned local variables in Thumb1 mode.	Tim Northover	2014-10-14	1	-0/+2
*	Add a thread-model knob for lowering atomics on baremetal & single threaded s...	Jonathan Roelofs	2014-08-21	1	-0/+113
*	ARM: do not generate BLX instructions on Cortex-M CPUs.	Tim Northover	2014-08-06	1	-1/+24
*	IR: add "cmpxchg weak" variant to support permitted failure.	Tim Northover	2014-06-13	1	-2/+4
*	ARM: skip cmpxchg failure barrier if ordering is monotonic.	Tim Northover	2014-04-03	1	-0/+37
*	ARM: don't expand atomicrmw inline on Cortex-M0	Tim Northover	2013-10-25	1	-0/+1
*	LegalizeDAG: allow libcalls for max/min atomic operations	Tim Northover	2013-10-25	1	-0/+24
*	Fix a couple of typos in EmitAtomic.	Jakob Stoklund Olesen	2012-08-31	1	-0/+10
*	Fix a couple of copy-n-paste bugs. Noticed by George Russell!	Chad Rosier	2011-12-21	1	-0/+58
*	Fix a couple of copy-n-paste bugs. Noticed by George Russell.	Evan Cheng	2011-12-21	1	-4/+26
*	Convert more tests over to the new atomic instructions.	Eli Friedman	2011-09-26	1	-33/+11
*	Atomic pseudos don't use (as in read) CPSR. They clobber it.	Jakob Stoklund Olesen	2011-09-06	1	-2/+2
*	Fix the remaining atomic intrinsics to use the right register classes on Thumb2,	Cameron Zwarich	2011-05-27	1	-0/+103