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path: root/llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
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* Revert [MBP] Disable aggressive loop rotate in plain modeJordan Rupprecht2019-08-291-3/+2
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-221-2/+3
* Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"Hans Wennborg2019-08-121-3/+2
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-081-2/+3
* [ARM] Comply with rules on ARMv8-A thumb mode partial deprecation of IT.Huihui Zhang2019-06-181-3/+4
* [MBP] Move a latch block with conditional exit and multi predecessors to top ...Guozhi Wei2019-06-141-3/+2
* [ARM] Add some more missing T1 opcodes for the peephole optimisierDavid Green2019-02-251-1/+0
* [SchedModel] Fix for read advance cycles with implicit pseudo operands.Jonas Paulsson2018-10-301-1/+1
* [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1.Eli Friedman2018-10-261-2/+1
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-5/+5
* ARM: Do not use llc -march in tests.Matthias Braun2017-08-011-1/+1
* [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).Kristof Beyls2017-06-281-1/+1
* In Thumb1, materialize a move between low registers as a `movs`, if CPSR isn'...Artyom Skrobov2017-03-071-4/+2
* [ARM] don't transform an add(ext Cond), C to select unless there's a setcc of...Sanjay Patel2017-02-271-9/+13
* [ARM] auto-generate complete checks; NFCSanjay Patel2017-02-241-8/+34
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-311-3/+3
* Revert "CodeGen: Allow small copyable blocks to "break" the CFG."Kyle Butt2017-01-111-3/+3
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-101-3/+3
* [Thumb] Teach ISel how to lower compares of AND bitmasks efficientlySjoerd Meijer2016-12-151-5/+4
* Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"James Molloy2016-11-031-6/+9
* [Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy2016-11-031-9/+6
* Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"James Molloy2016-09-141-6/+9
* [Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy2016-09-131-9/+6
* Revert r281215, it caused PR30358.Nico Weber2016-09-121-6/+9
* [Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy2016-09-121-9/+6
* Reapply [BranchFolding] Restrict tail merging loop blocks after MBPHaicheng Wu2016-08-121-1/+1
* Revert "[BranchFolding] Restrict tail merging loop blocks after MBP"Haicheng Wu2016-08-121-1/+1
* [BranchFolding] Restrict tail merging loop blocks after MBPHaicheng Wu2016-08-121-1/+1
* Reapply "[MBP] Reduce code size by running tail merging in MBP.""Haicheng Wu2016-06-091-1/+1
* Revert "[MBP] Reduce code size by running tail merging in MBP."Haicheng Wu2016-06-071-1/+1
* [MBP] Reduce code size by running tail merging in MBP.Haicheng Wu2016-06-061-1/+1
* ARM: fix peephole optimisation of TSTTim Northover2015-04-281-6/+28
* Switch lowering: Take branch weight into account when ordering for fall-throughHans Wennborg2015-04-271-2/+4
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-3/+3
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-6/+6
* ARM & AArch64: make use of common cmpxchg idioms after expansionTim Northover2014-05-301-4/+4
* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-4/+4
* Enabling thumb2 mode used to force support for armv6t2. Replace thisJoerg Sonnenberger2013-12-131-1/+2
* [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.Joey Gouly2013-09-091-0/+23
* Weekly fix of register allocation dependent unit tests.Jakob Stoklund Olesen2011-04-301-2/+2
* Fix ARM tests to be register allocator independent.Jakob Stoklund Olesen2011-03-311-3/+3
* Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,Evan Cheng2010-11-171-3/+2
* When we look at instructions to convert to setting the 's' flag, we need to lookBill Wendling2010-11-011-9/+14
* More tests to XFAIL. The arm-and-txt-peephole.ll test passes even when theBill Wendling2010-11-011-4/+3
* Disable because peephole is disabled.Bill Wendling2010-11-011-0/+1
* ARM instructions that are both predicated and set the condition codesBob Wilson2010-10-151-0/+47
* do not compare actual branch labels; this may fix llvm-gcc-x86_64-darwin10-cr...Gabor Greif2010-09-291-3/+3
* improve heuristics to find the 'and' corresponding to 'tst' to also catch opp...Gabor Greif2010-09-291-8/+12
* Enable code placement optimization pass for ARM.Evan Cheng2010-09-241-2/+2
* Reapply Gabor's 113839, 113840, and 113876 with a fix for a problemBob Wilson2010-09-151-2/+1
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