| Commit message (Expand) | Author | Age | Files | Lines |
* | Revert [MBP] Disable aggressive loop rotate in plain mode | Jordan Rupprecht | 2019-08-29 | 1 | -3/+2 |
* | [MBP] Disable aggressive loop rotate in plain mode | Guozhi Wei | 2019-08-22 | 1 | -2/+3 |
* | Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode" | Hans Wennborg | 2019-08-12 | 1 | -3/+2 |
* | [MBP] Disable aggressive loop rotate in plain mode | Guozhi Wei | 2019-08-08 | 1 | -2/+3 |
* | [ARM] Comply with rules on ARMv8-A thumb mode partial deprecation of IT. | Huihui Zhang | 2019-06-18 | 1 | -3/+4 |
* | [MBP] Move a latch block with conditional exit and multi predecessors to top ... | Guozhi Wei | 2019-06-14 | 1 | -3/+2 |
* | [ARM] Add some more missing T1 opcodes for the peephole optimisier | David Green | 2019-02-25 | 1 | -1/+0 |
* | [SchedModel] Fix for read advance cycles with implicit pseudo operands. | Jonas Paulsson | 2018-10-30 | 1 | -1/+1 |
* | [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1. | Eli Friedman | 2018-10-26 | 1 | -2/+1 |
* | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -5/+5 |
* | ARM: Do not use llc -march in tests. | Matthias Braun | 2017-08-01 | 1 | -1/+1 |
* | [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). | Kristof Beyls | 2017-06-28 | 1 | -1/+1 |
* | In Thumb1, materialize a move between low registers as a `movs`, if CPSR isn'... | Artyom Skrobov | 2017-03-07 | 1 | -4/+2 |
* | [ARM] don't transform an add(ext Cond), C to select unless there's a setcc of... | Sanjay Patel | 2017-02-27 | 1 | -9/+13 |
* | [ARM] auto-generate complete checks; NFC | Sanjay Patel | 2017-02-24 | 1 | -8/+34 |
* | CodeGen: Allow small copyable blocks to "break" the CFG. | Kyle Butt | 2017-01-31 | 1 | -3/+3 |
* | Revert "CodeGen: Allow small copyable blocks to "break" the CFG." | Kyle Butt | 2017-01-11 | 1 | -3/+3 |
* | CodeGen: Allow small copyable blocks to "break" the CFG. | Kyle Butt | 2017-01-10 | 1 | -3/+3 |
* | [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently | Sjoerd Meijer | 2016-12-15 | 1 | -5/+4 |
* | Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently" | James Molloy | 2016-11-03 | 1 | -6/+9 |
* | [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently | James Molloy | 2016-11-03 | 1 | -9/+6 |
* | Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently" | James Molloy | 2016-09-14 | 1 | -6/+9 |
* | [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently | James Molloy | 2016-09-13 | 1 | -9/+6 |
* | Revert r281215, it caused PR30358. | Nico Weber | 2016-09-12 | 1 | -6/+9 |
* | [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently | James Molloy | 2016-09-12 | 1 | -9/+6 |
* | Reapply [BranchFolding] Restrict tail merging loop blocks after MBP | Haicheng Wu | 2016-08-12 | 1 | -1/+1 |
* | Revert "[BranchFolding] Restrict tail merging loop blocks after MBP" | Haicheng Wu | 2016-08-12 | 1 | -1/+1 |
* | [BranchFolding] Restrict tail merging loop blocks after MBP | Haicheng Wu | 2016-08-12 | 1 | -1/+1 |
* | Reapply "[MBP] Reduce code size by running tail merging in MBP."" | Haicheng Wu | 2016-06-09 | 1 | -1/+1 |
* | Revert "[MBP] Reduce code size by running tail merging in MBP." | Haicheng Wu | 2016-06-07 | 1 | -1/+1 |
* | [MBP] Reduce code size by running tail merging in MBP. | Haicheng Wu | 2016-06-06 | 1 | -1/+1 |
* | ARM: fix peephole optimisation of TST | Tim Northover | 2015-04-28 | 1 | -6/+28 |
* | Switch lowering: Take branch weight into account when ordering for fall-through | Hans Wennborg | 2015-04-27 | 1 | -2/+4 |
* | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie | 2015-02-27 | 1 | -3/+3 |
* | [opaque pointer type] Add textual IR support for explicit type parameter to g... | David Blaikie | 2015-02-27 | 1 | -6/+6 |
* | ARM & AArch64: make use of common cmpxchg idioms after expansion | Tim Northover | 2014-05-30 | 1 | -4/+4 |
* | ARM: fixup more tests to specify the target more explicitly | Saleem Abdulrasool | 2014-04-03 | 1 | -4/+4 |
* | Enabling thumb2 mode used to force support for armv6t2. Replace this | Joerg Sonnenberger | 2013-12-13 | 1 | -1/+2 |
* | [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode. | Joey Gouly | 2013-09-09 | 1 | -0/+23 |
* | Weekly fix of register allocation dependent unit tests. | Jakob Stoklund Olesen | 2011-04-30 | 1 | -2/+2 |
* | Fix ARM tests to be register allocator independent. | Jakob Stoklund Olesen | 2011-03-31 | 1 | -3/+3 |
* | Remove ARM isel hacks that fold large immediates into a pair of add, sub, and, | Evan Cheng | 2010-11-17 | 1 | -3/+2 |
* | When we look at instructions to convert to setting the 's' flag, we need to look | Bill Wendling | 2010-11-01 | 1 | -9/+14 |
* | More tests to XFAIL. The arm-and-txt-peephole.ll test passes even when the | Bill Wendling | 2010-11-01 | 1 | -4/+3 |
* | Disable because peephole is disabled. | Bill Wendling | 2010-11-01 | 1 | -0/+1 |
* | ARM instructions that are both predicated and set the condition codes | Bob Wilson | 2010-10-15 | 1 | -0/+47 |
* | do not compare actual branch labels; this may fix llvm-gcc-x86_64-darwin10-cr... | Gabor Greif | 2010-09-29 | 1 | -3/+3 |
* | improve heuristics to find the 'and' corresponding to 'tst' to also catch opp... | Gabor Greif | 2010-09-29 | 1 | -8/+12 |
* | Enable code placement optimization pass for ARM. | Evan Cheng | 2010-09-24 | 1 | -2/+2 |
* | Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem | Bob Wilson | 2010-09-15 | 1 | -2/+1 |