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path: root/llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
Commit message (Expand)AuthorAgeFilesLines
* [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir...Guillaume Chatelet2019-09-111-2/+2
* [AMDGPU] Correct the setting of `FlatScratchInit`.Michael Liao2019-07-041-2/+4
* Describe stack-id as an enumSander de Smalen2019-06-171-2/+2
* [AMDGPU] gfx1010 VMEM and SMEM implementationStanislav Mekhanoshin2019-04-301-2/+2
* [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source modifiersTim Renouf2019-03-181-2/+2
* [AMDGPU] Add support for immediate operand for S_ENDPGMDavid Stuttard2019-03-121-2/+2
* AMDGPU: Fix tests using old number for constant address spaceMatt Arsenault2018-09-101-2/+2
* [MIR] Add support for debug metadata for fixed stack objectsFrancis Visoiu Mistrih2018-04-251-2/+4
* [AMDGPU] Switch to the new addr space mapping by defaultYaxun Liu2018-02-021-5/+5
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-52/+52
* AMDGPU: Fix testMatt Arsenault2017-11-141-6/+3
* AMDGPU: Fix producing saveexec when the copy is spilledMatt Arsenault2017-11-141-0/+144
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