| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] Automatically generate various tests. NFC | Amaury Sechet | 2019-08-23 | 1 | -51/+182 |
| | | | | | llvm-svn: 369787 | ||||
| * | [AMDGPU] Disable SReg Global LD/ST, perf regression | Ron Lieberman | 2018-11-30 | 1 | -1/+1 |
| | | | | | | | Differential Revision: https://reviews.llvm.org/D55093 llvm-svn: 348014 | ||||
| * | [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST | Ron Lieberman | 2018-11-16 | 1 | -1/+1 |
| | | | | | | | | | | Add a pass to fixup various vector ISel issues. Currently we handle converting GLOBAL_{LOAD|STORE}_* and GLOBAL_Atomic_* instructions into their _SADDR variants. This involves feeding the sreg into the saddr field of the new instruction. llvm-svn: 347008 | ||||
| * | run post-RA hazard recognizer pass late | Mark Searles | 2018-07-16 | 1 | -1/+5 |
| | | | | | | | | | | | | | | Memory legalizer, waitcnt, and shrink passes can perturb the instructions, which means that the post-RA hazard recognizer pass should run after them. Otherwise, one of those passes may invalidate the work done by the hazard recognizer. Note that this has adverse side-effect that any consecutive S_NOP 0's, emitted by the hazard recognizer, will not be shrunk into a single S_NOP <N>. This should be addressed in a follow-on patch. Differential Revision: https://reviews.llvm.org/D49288 llvm-svn: 337154 | ||||
| * | [AMDGPU] Construct memory clauses before RA | Stanislav Mekhanoshin | 2018-05-31 | 1 | -0/+166 |
| Memory clauses are formed into bundles in presence of xnack. Their source operands are marked as early-clobber. This allows to allocate distinct source and destination registers within a clause and prevent breaking the clause with s_nop in the hazard recognizer. Clauses are undone before post-RA scheduler to allow some rescheduling, which will not break the clause since artificial edges are created in the dag to keep memory operations together. Yet this allows a better ILP in some cases. Differential Revision: https://reviews.llvm.org/D47511 llvm-svn: 333691 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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