[AMDGPU] Automatically generate various tests. NFC

llvm-svn: 369787

1 files changed, 182 insertions, 51 deletions

diff --git a/llvm/test/CodeGen/AMDGPU/memory_clause.ll b/llvm/test/CodeGen/AMDGPU/memory_clause.ll
index 9ae068a4340..c721de65812 100644
--- a/llvm/test/CodeGen/AMDGPU/memory_clause.ll
+++ b/llvm/test/CodeGen/AMDGPU/memory_clause.ll
@@ -1,12 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefix=GCN %s
 
-; GCN-LABEL: {{^}}vector_clause:
-; GCN:      global_load_dwordx4
-; GCN-NEXT: global_load_dwordx4
-; GCN-NEXT: global_load_dwordx4
-; GCN-NEXT: global_load_dwordx4
-; GCN-NEXT: s_nop
 define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
+; GCN-LABEL: vector_clause:
+; GCN:       ; %bb.0: ; %bb
+; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x24
+; GCN-NEXT:    v_mov_b32_e32 v17, 0
+; GCN-NEXT:    v_lshlrev_b32_e32 v16, 4, v0
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x2c
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    global_load_dwordx4 v[0:3], v[16:17], s[2:3]
+; GCN-NEXT:    global_load_dwordx4 v[4:7], v[16:17], s[2:3] offset:16
+; GCN-NEXT:    global_load_dwordx4 v[8:11], v[16:17], s[2:3] offset:32
+; GCN-NEXT:    global_load_dwordx4 v[12:15], v[16:17], s[2:3] offset:48
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_waitcnt vmcnt(3)
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_store_dwordx4 v[16:17], v[0:3], s[4:5]
+; GCN-NEXT:    s_waitcnt vmcnt(3)
+; GCN-NEXT:    global_store_dwordx4 v[16:17], v[4:7], s[4:5] offset:16
+; GCN-NEXT:    s_waitcnt vmcnt(3)
+; GCN-NEXT:    global_store_dwordx4 v[16:17], v[8:11], s[4:5] offset:32
+; GCN-NEXT:    s_waitcnt vmcnt(3)
+; GCN-NEXT:    global_store_dwordx4 v[16:17], v[12:15], s[4:5] offset:48
+; GCN-NEXT:    s_endpgm
 bb:
   %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
   %tmp2 = zext i32 %tmp to i64
@@ -32,16 +49,45 @@ bb:
   ret void
 }
 
-; GCN-LABEL: {{^}}scalar_clause:
-; GCN:      s_load_dwordx2
-; GCN-NEXT: s_load_dwordx2
-; GCN-NEXT: s_nop
-; GCN-NEXT: s_waitcnt lgkmcnt(0)
-; GCN-NEXT: s_load_dwordx4
-; GCN-NEXT: s_load_dwordx4
-; GCN-NEXT: s_load_dwordx4
-; GCN-NEXT: s_load_dwordx4
 define amdgpu_kernel void @scalar_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
+; GCN-LABEL: scalar_clause:
+; GCN:       ; %bb.0: ; %bb
+; GCN-NEXT:    s_load_dwordx2 s[16:17], s[0:1], 0x24
+; GCN-NEXT:    s_load_dwordx2 s[18:19], s[0:1], 0x2c
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[16:17], 0x0
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[16:17], 0x10
+; GCN-NEXT:    s_load_dwordx4 s[8:11], s[16:17], 0x20
+; GCN-NEXT:    s_load_dwordx4 s[12:15], s[16:17], 0x30
+; GCN-NEXT:    v_mov_b32_e32 v12, s18
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    v_mov_b32_e32 v0, s0
+; GCN-NEXT:    v_mov_b32_e32 v4, s4
+; GCN-NEXT:    v_mov_b32_e32 v13, s19
+; GCN-NEXT:    v_mov_b32_e32 v1, s1
+; GCN-NEXT:    v_mov_b32_e32 v2, s2
+; GCN-NEXT:    v_mov_b32_e32 v3, s3
+; GCN-NEXT:    v_mov_b32_e32 v5, s5
+; GCN-NEXT:    v_mov_b32_e32 v6, s6
+; GCN-NEXT:    v_mov_b32_e32 v7, s7
+; GCN-NEXT:    v_mov_b32_e32 v8, s8
+; GCN-NEXT:    v_mov_b32_e32 v9, s9
+; GCN-NEXT:    v_mov_b32_e32 v10, s10
+; GCN-NEXT:    v_mov_b32_e32 v11, s11
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_store_dwordx4 v[12:13], v[0:3], off
+; GCN-NEXT:    global_store_dwordx4 v[12:13], v[4:7], off offset:16
+; GCN-NEXT:    v_mov_b32_e32 v0, s12
+; GCN-NEXT:    v_mov_b32_e32 v1, s13
+; GCN-NEXT:    v_mov_b32_e32 v2, s14
+; GCN-NEXT:    v_mov_b32_e32 v3, s15
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_store_dwordx4 v[12:13], v[8:11], off offset:32
+; GCN-NEXT:    global_store_dwordx4 v[12:13], v[0:3], off offset:48
+; GCN-NEXT:    s_endpgm
 bb:
   %tmp = load <4 x i32>, <4 x i32> addrspace(1)* %arg, align 16
   %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 1
@@ -60,26 +106,70 @@ bb:
   ret void
 }
 
-; GCN-LABEL: {{^}}mubuf_clause:
-; GCN:      buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: buffer_load_dword
-; GCN-NEXT: s_nop
-; GCN-NEXT: s_nop
-; GCN-NEXT: buffer_load_dword
 define void @mubuf_clause(<4 x i32> addrspace(5)* noalias nocapture readonly %arg, <4 x i32> addrspace(5)* noalias nocapture %arg1) {
+; GCN-LABEL: mubuf_clause:
+; GCN:       ; %bb.0: ; %bb
+; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT:    v_and_b32_e32 v2, 0x3ff, v2
+; GCN-NEXT:    v_lshlrev_b32_e32 v2, 4, v2
+; GCN-NEXT:    v_add_u32_e32 v0, v0, v2
+; GCN-NEXT:    v_add_u32_e32 v1, v1, v2
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    buffer_load_dword v3, v0, s[0:3], s33 offen
+; GCN-NEXT:    buffer_load_dword v4, v0, s[0:3], s33 offen offset:4
+; GCN-NEXT:    buffer_load_dword v5, v0, s[0:3], s33 offen offset:8
+; GCN-NEXT:    buffer_load_dword v6, v0, s[0:3], s33 offen offset:12
+; GCN-NEXT:    buffer_load_dword v7, v0, s[0:3], s33 offen offset:16
+; GCN-NEXT:    buffer_load_dword v8, v0, s[0:3], s33 offen offset:20
+; GCN-NEXT:    buffer_load_dword v9, v0, s[0:3], s33 offen offset:24
+; GCN-NEXT:    buffer_load_dword v10, v0, s[0:3], s33 offen offset:28
+; GCN-NEXT:    buffer_load_dword v11, v0, s[0:3], s33 offen offset:32
+; GCN-NEXT:    buffer_load_dword v12, v0, s[0:3], s33 offen offset:36
+; GCN-NEXT:    buffer_load_dword v13, v0, s[0:3], s33 offen offset:40
+; GCN-NEXT:    buffer_load_dword v14, v0, s[0:3], s33 offen offset:44
+; GCN-NEXT:    buffer_load_dword v15, v0, s[0:3], s33 offen offset:48
+; GCN-NEXT:    buffer_load_dword v16, v0, s[0:3], s33 offen offset:52
+; GCN-NEXT:    buffer_load_dword v17, v0, s[0:3], s33 offen offset:56
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    buffer_load_dword v0, v0, s[0:3], s33 offen offset:60
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    buffer_store_dword v3, v1, s[0:3], s33 offen
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v4, v1, s[0:3], s33 offen offset:4
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v5, v1, s[0:3], s33 offen offset:8
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v6, v1, s[0:3], s33 offen offset:12
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v7, v1, s[0:3], s33 offen offset:16
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v8, v1, s[0:3], s33 offen offset:20
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v9, v1, s[0:3], s33 offen offset:24
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v10, v1, s[0:3], s33 offen offset:28
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v11, v1, s[0:3], s33 offen offset:32
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v12, v1, s[0:3], s33 offen offset:36
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v13, v1, s[0:3], s33 offen offset:40
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v14, v1, s[0:3], s33 offen offset:44
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v15, v1, s[0:3], s33 offen offset:48
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v16, v1, s[0:3], s33 offen offset:52
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v17, v1, s[0:3], s33 offen offset:56
+; GCN-NEXT:    s_waitcnt vmcnt(15)
+; GCN-NEXT:    buffer_store_dword v0, v1, s[0:3], s33 offen offset:60
+; GCN-NEXT:    s_waitcnt vmcnt(0)
+; GCN-NEXT:    s_setpc_b64 s[30:31]
 bb:
   %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
   %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp
@@ -104,14 +194,29 @@ bb:
   ret void
 }
 
-; GCN-LABEL: {{^}}vector_clause_indirect:
-; GCN: global_load_dwordx2 [[ADDR:v\[[0-9:]+\]]], v[{{[0-9:]+}}], s[{{[0-9:]+}}]
-; GCN-NEXT: s_nop 0
-; GCN-NEXT: s_waitcnt vmcnt(0)
-; GCN-NEXT: s_nop 0
-; GCN-NEXT: global_load_dwordx4 v[{{[0-9:]+}}], [[ADDR]], off
-; GCN-NEXT: global_load_dwordx4 v[{{[0-9:]+}}], [[ADDR]], off offset:16
 define amdgpu_kernel void @vector_clause_indirect(i64 addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture readnone %arg1, <4 x i32> addrspace(1)* noalias nocapture %arg2) {
+; GCN-LABEL: vector_clause_indirect:
+; GCN:       ; %bb.0: ; %bb
+; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x24
+; GCN-NEXT:    v_mov_b32_e32 v1, 0
+; GCN-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x34
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    global_load_dwordx2 v[8:9], v[0:1], s[2:3]
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_waitcnt vmcnt(0)
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_load_dwordx4 v[0:3], v[8:9], off
+; GCN-NEXT:    global_load_dwordx4 v[4:7], v[8:9], off offset:16
+; GCN-NEXT:    v_mov_b32_e32 v9, s5
+; GCN-NEXT:    v_mov_b32_e32 v8, s4
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_waitcnt vmcnt(1)
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_store_dwordx4 v[8:9], v[0:3], off
+; GCN-NEXT:    s_waitcnt vmcnt(1)
+; GCN-NEXT:    global_store_dwordx4 v[8:9], v[4:7], off offset:16
+; GCN-NEXT:    s_endpgm
 bb:
   %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
   %tmp3 = zext i32 %tmp to i64
@@ -127,12 +232,25 @@ bb:
   ret void
 }
 
-; GCN-LABEL: {{^}}load_global_d16_hi:
-; GCN:      global_load_short_d16_hi v
-; GCN-NEXT: s_nop
-; GCN-NEXT: s_nop
-; GCN-NEXT: global_load_short_d16_hi v
 define void @load_global_d16_hi(i16 addrspace(1)* %in, i16 %reg, <2 x i16> addrspace(1)* %out) {
+; GCN-LABEL: load_global_d16_hi:
+; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT:    v_mov_b32_e32 v5, v2
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_load_short_d16_hi v5, v[0:1], off
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_load_short_d16_hi v2, v[0:1], off offset:64
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_waitcnt vmcnt(1)
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_store_dword v[3:4], v5, off
+; GCN-NEXT:    s_waitcnt vmcnt(1)
+; GCN-NEXT:    global_store_dword v[3:4], v2, off offset:128
+; GCN-NEXT:    s_waitcnt vmcnt(0)
+; GCN-NEXT:    s_setpc_b64 s[30:31]
 entry:
   %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
   %load1 = load i16, i16 addrspace(1)* %in
@@ -147,12 +265,25 @@ entry:
   ret void
 }
 
-; GCN-LABEL: {{^}}load_global_d16_lo:
-; GCN:      global_load_short_d16 v
-; GCN-NEXT: s_nop
-; GCN-NEXT: s_nop
-; GCN-NEXT: global_load_short_d16 v
 define void @load_global_d16_lo(i16 addrspace(1)* %in, i32 %reg, <2 x i16> addrspace(1)* %out) {
+; GCN-LABEL: load_global_d16_lo:
+; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT:    v_mov_b32_e32 v5, v2
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_load_short_d16 v5, v[0:1], off
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_load_short_d16 v2, v[0:1], off offset:64
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    s_waitcnt vmcnt(1)
+; GCN-NEXT:    s_nop 0
+; GCN-NEXT:    global_store_dword v[3:4], v5, off
+; GCN-NEXT:    s_waitcnt vmcnt(1)
+; GCN-NEXT:    global_store_dword v[3:4], v2, off offset:128
+; GCN-NEXT:    s_waitcnt vmcnt(0)
+; GCN-NEXT:    s_setpc_b64 s[30:31]
 entry:
   %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
   %reg.bc1 = bitcast i32 %reg to <2 x i16>