| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU: Relax 32-bit SGPR register class | Matt Arsenault | 2019-10-18 | 1 | -3/+1 |
| * | AMDGPU: Fold frame index into MUBUF | Matt Arsenault | 2019-06-24 | 1 | -2/+1 |
| * | AMDGPU: Fold readlane from copy of SGPR or imm | Matt Arsenault | 2019-06-18 | 1 | -6/+44 |
| * | AMDGPU: Fix capitalized register names in asm constraints | Matt Arsenault | 2019-06-14 | 1 | -1/+1 |
| * | AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel | Matt Arsenault | 2017-03-21 | 1 | -3/+3 |
| * | AMDGPU/SI: Add back reverted SGPR spilling code, but disable it | Marek Olsak | 2016-11-25 | 1 | -1/+2 |
| * | Revert "AMDGPU: Make m0 unallocatable" | Marek Olsak | 2016-11-25 | 1 | -2/+1 |
| * | AMDGPU: Make m0 unallocatable | Matt Arsenault | 2016-11-24 | 1 | -1/+2 |
| * | AMDGCN/SI: Implement readlane/readfirstlane intrinsics | Changpeng Fang | 2016-08-24 | 1 | -0/+35 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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