| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] Add buffer/load 8/16 bit overloaded intrinsics | Ryan Taylor | 2019-03-19 | 1 | -0/+26 |
| * | [AMDGPU] Extend the SI Load/Store optimizer to combine more things. | Neil Henning | 2018-12-12 | 1 | -1/+64 |
| * | [AMDGPU][Waitcnt] As of gfx7, VMEM operations do not increment the export cou... | Mark Searles | 2018-04-26 | 1 | -2/+2 |
| * | AMDGPU: Merge BUFFER_STORE_DWORD_OFFEN/OFFSET into x2, x4 | Marek Olsak | 2017-11-09 | 1 | -0/+75 |
| * | AMDGPU: Lower buffer store and atomic intrinsics manually | Marek Olsak | 2017-11-09 | 1 | -0/+9 |
| * | [AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests. | Mark Searles | 2017-06-02 | 1 | -1/+1 |
| * | AMDGPU/SI: Assembler: Unify parsing/printing of operands. | Nikolay Haustov | 2016-04-29 | 1 | -4/+4 |
| * | AMDGPU: add llvm.amdgcn.buffer.load/store intrinsics | Nicolai Haehnle | 2016-04-12 | 1 | -0/+95 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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