summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
Commit message (Expand)AuthorAgeFilesLines
* [AMDGPU] Fix emitIfBreak CF lowering: use temp reg to make register coalescer...vpykhtin2019-11-261-3/+2
* [AMDGPU] Come back patch for the 'Assign register class for cross block value...Alexander Timofeev2019-10-141-14/+14
* Revert [MBP] Disable aggressive loop rotate in plain modeJordan Rupprecht2019-08-291-6/+6
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-221-6/+6
* Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"Hans Wennborg2019-08-121-6/+6
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-081-6/+6
* [MBP] Move a latch block with conditional exit and multi predecessors to top ...Guozhi Wei2019-06-141-6/+6
* [AMDGPU] Partial revert for the ba447bae7448435c9986eece0811da1423972fddAlexander Timofeev2019-06-061-2/+8
* [AMDGPU] Divergence driven ISel. Assign register class for cross block va...Alexander Timofeev2019-05-261-8/+2
* Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for c...Peter Collingbourne2019-05-251-2/+8
* [AMDGPU] Divergence driven ISel. Assign register class for cross block values...Alexander Timofeev2019-05-241-8/+2
* AMDGPU: Rewrite SILowerI1Copies to always stay on SALUNicolai Haehnle2018-10-311-12/+18
* [AMDGPU] Enable LICM in the BE pipelineStanislav Mekhanoshin2018-06-291-5/+7
* AMDGPU: Fix copying i1 value out of loop with non-uniform exitNicolai Haehnle2018-04-041-0/+48
OpenPOWER on IntegriCloud