| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir... | Guillaume Chatelet | 2019-09-11 | 1 | -2/+2 |
| * | [AMDGPU] Add support for immediate operand for S_ENDPGM | David Stuttard | 2019-03-12 | 1 | -3/+3 |
| * | [AMDGPU] Prevent sequences of non-instructions disrupting GCNHazardRecognizer... | Carl Ritson | 2018-09-10 | 1 | -0/+67 |
| * | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -16/+16 |
| * | [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. | Puyan Lotfi | 2018-01-10 | 1 | -1/+1 |
| * | AMDGPU: Make worst-case assumption about the wait states in inline assembly | Nicolai Haehnle | 2017-09-06 | 1 | -0/+29 |
| * | AMDGPU: IMPLICIT_DEFs and DBG_VALUEs do not contribute to wait states | Nicolai Haehnle | 2017-09-01 | 1 | -0/+31 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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