Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | [AMDGPU] Come back patch for the 'Assign register class for cross block value... | Alexander Timofeev | 2019-10-14 | 1 | -28/+30 |
* | [AMDGPU] Partial revert for the ba447bae7448435c9986eece0811da1423972fdd | Alexander Timofeev | 2019-06-06 | 1 | -30/+28 |
* | [AMDGPU] Divergence driven ISel. Assign register class for cross block va... | Alexander Timofeev | 2019-05-26 | 1 | -28/+30 |
* | Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for c... | Peter Collingbourne | 2019-05-25 | 1 | -30/+28 |
* | [AMDGPU] Divergence driven ISel. Assign register class for cross block values... | Alexander Timofeev | 2019-05-24 | 1 | -28/+30 |
* | [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression. | Alexander Timofeev | 2019-01-03 | 1 | -10/+10 |
* | [AMDGPU] Preliminary patch for divergence driven instruction selection. Immed... | Alexander Timofeev | 2018-09-11 | 1 | -47/+47 |
* | [AMDGPU] Improve reciprocal handling | Stanislav Mekhanoshin | 2018-06-06 | 1 | -0/+459 |