Commit message (Expand) | Author | Age | Files | Lines | |
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* | AMDGPU: Fix crash from inconsistent register types for v3i16/v3f16 | Matt Arsenault | 2019-08-27 | 1 | -0/+89 |
* | [AMDGPU] Created a sub-register class for the return address operand in the r... | Christudasan Devadasan | 2019-07-09 | 1 | -36/+28 |
* | AMDGPU: Make s34 the FP register | Matt Arsenault | 2019-07-08 | 1 | -84/+76 |
* | AMDGPU: Always use s33 for global scratch wave offset | Matt Arsenault | 2019-06-20 | 1 | -33/+33 |
* | AMDGPU: Don't fix emergency stack slot at offset 0 | Matt Arsenault | 2019-06-05 | 1 | -8/+8 |
* | AMDGPU: Activate all lanes when spilling CSR VGPR for SGPR spills | Matt Arsenault | 2019-05-24 | 1 | -9/+25 |
* | [AMDGPU] Mark test functions with hidden visibility | Scott Linder | 2019-02-01 | 1 | -5/+5 |
* | DAG: Don't use ABI copies in some contexts | Matt Arsenault | 2018-08-30 | 1 | -0/+176 |