| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU: Use SGPR_128 instead of SReg_128 for vregs | Matt Arsenault | 2019-10-10 | 1 | -2/+2 |
| * | [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir... | Guillaume Chatelet | 2019-09-11 | 1 | -1/+1 |
| * | [AMDGPU] gfx1010 VMEM and SMEM implementation | Stanislav Mekhanoshin | 2019-04-30 | 1 | -4/+4 |
| * | AMDGPU: Turn D16 for MIMG instructions into a regular operand | Nicolai Haehnle | 2018-06-21 | 1 | -2/+2 |
| * | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -9/+9 |
| * | Move .mir tests to appropriate directories | Matthias Braun | 2016-12-09 | 1 | -0/+75 |
| * | AMDGPU: Move mir tests into mir test directory | Matt Arsenault | 2016-11-30 | 1 | -75/+0 |
| * | AMDGPU: Add definitions for scalar store instructions | Matt Arsenault | 2016-10-28 | 1 | -4/+4 |
| * | Do not consider subreg defs as reads when computing subrange liveness | Krzysztof Parzyszek | 2016-09-02 | 1 | -0/+75 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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