| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Revert "Revert "[MIR] Target specific MIR formating and parsing"" | Daniel Sanders | 2020-01-08 | 1 | -100/+100 |
| * | Revert "[MIR] Target specific MIR formating and parsing" | Nico Weber | 2020-01-08 | 1 | -100/+100 |
| * | [MIR] Target specific MIR formating and parsing | Peng Guo | 2020-01-08 | 1 | -100/+100 |
| * | Revert "[MIR] Target specific MIR formating and parsing" | Daniel Sanders | 2020-01-08 | 1 | -100/+100 |
| * | [MIR] Target specific MIR formating and parsing | Peng Guo | 2020-01-08 | 1 | -100/+100 |
| * | AMDGPU: Relax 32-bit SGPR register class | Matt Arsenault | 2019-10-18 | 1 | -23/+23 |
| * | [AMDGPU] Come back patch for the 'Assign register class for cross block value... | Alexander Timofeev | 2019-10-14 | 1 | -16/+16 |
| * | AMDGPU: Use SGPR_128 instead of SReg_128 for vregs | Matt Arsenault | 2019-10-10 | 1 | -1/+1 |
| * | AMDGPU: Add offsets to MMO when lowering buffer intrinsics | Tom Stellard | 2019-10-08 | 1 | -0/+414 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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