| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] Come back patch for the 'Assign register class for cross block value... | Alexander Timofeev | 2019-10-14 | 1 | -6/+6 |
| * | AMDGPU: Make s34 the FP register | Matt Arsenault | 2019-07-08 | 1 | -16/+16 |
| * | [AMDGPU] Partial revert for the ba447bae7448435c9986eece0811da1423972fdd | Alexander Timofeev | 2019-06-06 | 1 | -6/+6 |
| * | [AMDGPU] Divergence driven ISel. Assign register class for cross block va... | Alexander Timofeev | 2019-05-26 | 1 | -6/+6 |
| * | Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for c... | Peter Collingbourne | 2019-05-25 | 1 | -6/+6 |
| * | [AMDGPU] Divergence driven ISel. Assign register class for cross block values... | Alexander Timofeev | 2019-05-24 | 1 | -6/+6 |
| * | AMDGPU: Add support for cross address space synchronization scopes | Konstantin Zhuravlyov | 2019-03-25 | 1 | -1/+3 |
| * | AMDGPU: Expand atomicrmw nand in IR | Matt Arsenault | 2018-10-02 | 1 | -0/+85 |

