Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr | Jay Foad | 2019-12-17 | 1 | -2/+2 |
* | Allow target to decide when to cluster loads/stores in misched | Stanislav Mekhanoshin | 2017-09-13 | 1 | -2/+2 |
* | AMDGPU: Allow SIShrinkInstructions to work in non-SSA | Matt Arsenault | 2017-07-10 | 1 | -5/+5 |
* | [AMDGPU] Narrow lshl from 64 to 32 bit if possible | Stanislav Mekhanoshin | 2017-05-22 | 1 | -2/+1 |
* | [AMDGPU] Generate range metadata for workitem id | Stanislav Mekhanoshin | 2017-04-12 | 1 | -1/+1 |
* | AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel | Matt Arsenault | 2017-03-21 | 1 | -8/+8 |
* | Enable FeatureFlatForGlobal on Volcanic Islands | Matt Arsenault | 2017-01-24 | 1 | -1/+1 |
* | AMDGPU: Select i16 instructions to VOP3 forms | Matt Arsenault | 2016-12-09 | 1 | -5/+5 |
* | AMDGPU: Add VI i16 support | Tom Stellard | 2016-11-10 | 1 | -0/+149 |
* | Revert "AMDGPU: Add VI i16 support" | Tom Stellard | 2016-11-04 | 1 | -149/+0 |
* | AMDGPU: Add VI i16 support | Tom Stellard | 2016-11-03 | 1 | -0/+149 |