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* [AArch64] Also combine vector selects fed by non-i1 SETCCs.Ahmed Bougacha2015-04-272-10/+14
* [AArch64] Don't assert when combining (v3f32 select (setcc f64)).Ahmed Bougacha2015-04-271-1/+31
* Teach AArch64\lit.local.cfg the new triple names windows-gnu and windows-msvc.Yaron Keren2015-04-241-1/+1
* [AArch64] Add nvcast patterns for v4f16 and v8f16Pirama Arumuga Nainar2015-04-231-0/+89
* [AArch64] Handle vec4, vec8, vec16 *itofp for halfPirama Arumuga Nainar2015-04-233-2/+303
* [AArch64] Disable complex GEP optimization by default.James Molloy2015-04-221-3/+3
* [GlobalMerge] Look at uses to create smaller global sets.Ahmed Bougacha2015-04-182-0/+157
* [AArch64] Don't force MVT::Untyped when selecting LD1LANEpost.Ahmed Bougacha2015-04-171-0/+22
* Fix another typo in r235224 testcase. NFC.Ahmed Bougacha2015-04-171-9/+9
* AArch64: Add test for returning [2 x i64] in registers. NFC.Pete Cooper2015-04-171-0/+11
* Fix typo in r235224 testcase. NFC.Ahmed Bougacha2015-04-171-1/+1
* [AArch64] Avoid vector->load dependency cycles when creating LD1*post.Ahmed Bougacha2015-04-171-1/+22
* Fix TRUNCATE splitting helper logic.James Molloy2015-04-171-0/+33
* [AArch64] Don't assert on f16 in DUP PerfectShuffle generator.Ahmed Bougacha2015-04-161-0/+37
* [opaque pointer type] Add textual IR support for explicit type parameter to t...David Blaikie2015-04-1616-51/+51
* Disable AArch64 fast-isel on big-endian call vector returns.Pete Cooper2015-04-161-0/+172
* TRUNCATE constant folding - minor fix for rL233224Simon Pilgrim2015-04-161-0/+21
* [CodeGen] Re-apply r234809 (concat of scalars), with an x86_mmx fix.Ahmed Bougacha2015-04-161-0/+125
* Revert r234809 because it caused PR23246.Nick Lewycky2015-04-161-125/+0
* Re-apply r234898 and fix tests.Daniel Jasper2015-04-151-1/+1
* Revert "The code that originally made me discover this is:"Rafael Espindola2015-04-141-1/+1
* The code that originally made me discover this is:Daniel Jasper2015-04-141-1/+1
* [CodeGen] Combine concat_vectors of scalars into build_vector.Ahmed Bougacha2015-04-131-0/+125
* Settle on a specific triple for the aarch64 testcaseKrzysztof Parzyszek2015-04-131-1/+1
* Also add mtriple to the aarch64 testcaseKrzysztof Parzyszek2015-04-131-1/+1
* Allow memory intrinsics to be tail callsKrzysztof Parzyszek2015-04-131-0/+31
* [CodeGen] Split -enable-global-merge into ARM and AArch64 options.Ahmed Bougacha2015-04-114-13/+13
* [AArch64] Promote f16 operations to f32.Ahmed Bougacha2015-04-102-109/+765
* [CodeGen] Combine concat_vector of trunc'd scalar to scalar_to_vector.Ahmed Bougacha2015-04-092-0/+20
* [AArch64][FastISel] Fix integer extend optimization.Juergen Ributzka2015-04-091-0/+19
* [AArch64] Add support for dynamic stack alignmentKristof Beyls2015-04-091-0/+491
* [AArch64] Remove redundant -march option. Also fix a think-o from r234462.Lang Hames2015-04-091-1/+1
* Not all triples put _ before function names. Specify a triple to make this te...Nick Lewycky2015-04-091-1/+1
* [AArch64] Teach AArch64TargetLowering::getOptimalMemOpType to consider alignmentLang Hames2015-04-091-0/+14
* Use option -march instead of -mtriple to avoid overconditionalizing the test.Akira Hatanaka2015-04-081-2/+2
* Pass -mtriple to llc to appease buildbot.Akira Hatanaka2015-04-081-1/+1
* [DAGCombine] Fix a bug in MergeConsecutiveStores.Akira Hatanaka2015-04-081-0/+20
* [DAGCombiner] Combine shuffles of BUILD_VECTOR and SCALAR_TO_VECTORSimon Pilgrim2015-04-032-68/+29
* Fix PR23065. Avoid optimizing bitcast of build_vector with constant input to ...Jiangning Liu2015-04-011-0/+27
* [AArch64] Enable the codegenprepare optimization that promotes operation to formQuentin Colombet2015-03-311-0/+638
* AArch64: fix v8.1 sqrdmlah tests on Darwin platformsTim Northover2015-03-311-2/+2
* [AArch64] Add v8.1a "Rounding Double Multiply Add/Subtract" extensionVladimir Sukharev2015-03-311-0/+456
* [SDAG] Move TRUNCATE splitting logic into a helper, and useJames Molloy2015-03-312-11/+27
* [AArch64] Fix poor codegen for add immediate.Quentin Colombet2015-03-311-0/+28
* Transfer implicit operands when expanding the RET_ReallyLR pseudo instruction.Juergen Ributzka2015-03-301-0/+47
* [AArch64InstPrinter] Use the feature bits of the subtarget passed to the printAkira Hatanaka2015-03-271-0/+11
* [CodeGen] Don't attempt a tail-call with a non-forwarded explicit sret.Ahmed Bougacha2015-03-271-0/+106
* [CodeGen] Don't attempt a tail-call with implicit sret.Ahmed Bougacha2015-03-271-0/+46
* Complete the MachineScheduler fix made way back in r210390.Andrew Trick2015-03-273-11/+11
* [AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1.Ahmed Bougacha2015-03-234-13/+13
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