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path: root/llvm/test/CodeGen/AArch64/sibling-call.ll
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* AArch64: support arm64_32, an ILP32 slice for watchOS.Tim Northover2019-09-121-12/+12
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-2/+2
* [AArch64] Register passes so they can be run by llcDiana Picus2016-08-011-1/+1
* AArch64: allow MOV (imm) alias to be printedTim Northover2016-06-161-1/+1
* Complete the MachineScheduler fix made way back in r210390.Andrew Trick2015-03-271-1/+1
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-1/+1
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-1/+1
* AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.Tim Northover2014-05-241-1/+0
* AArch64/ARM64: enable more AArch64 tests.Tim Northover2014-05-221-6/+7
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-141-8/+8
* Teach ReMaterialization to be more cunning about subregistersTim Northover2013-05-291-2/+2
* Add explicit triples to AArch64 testsTim Northover2013-02-011-1/+1
* Add AArch64 as an experimental target.Tim Northover2013-01-311-0/+97
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