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path: root/llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
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* [AArch64] Improve FP16 instruction selection for vector round and vector conv...Abderrazek Zaafrani2019-03-061-15/+19
* [AArch64] Improve FP16 vector convert from short instructions.Abderrazek Zaafrani2019-02-281-14/+17
* [AArch64] Generate FP16 vector compare instructions.Abderrazek Zaafrani2019-02-281-126/+18
* [AArch64] optimise v4f16 fcmps to utilise vector instructionsCarey Williams2018-01-221-176/+85
* [AArch64][TableGen] Skip tied result operands for InstAliasSander de Smalen2017-11-201-23/+17
* [AArch64] allow v4f16 types when FullFP16 is supportedSjoerd Meijer2017-08-301-323/+508
* Revert r294437 as it broke an asan buildbot.Amara Emerson2017-02-081-8/+8
* [AArch64][TableGen] Skip tied result operands for InstAliasAmara Emerson2017-02-081-8/+8
* AArch64: allow MOV (imm) alias to be printedTim Northover2016-06-161-1/+1
* add support for -print-imm-hex for AArch64Paul Osmialowski2016-05-131-2/+2
* [AArch64] Generate csinv instruction more oftenGeoff Berry2016-02-231-64/+65
* Do not lower VSETCC if operand is an f16 vectorPirama Arumuga Nainar2016-01-221-0/+274
* Fix fptosi, fptoui from f16 vectors to i8, i16 vectorsPirama Arumuga Nainar2015-12-101-1/+41
* Define selection for v4f16, v8f16 scalar_to_vectorPirama Arumuga Nainar2015-12-081-0/+9
* [AArch64] Handle vec4, vec8, vec16 *itofp for halfPirama Arumuga Nainar2015-04-231-1/+91
* Fix bug while building FP16 constant vectors for AArch64Pirama Arumuga Nainar2015-03-171-0/+9
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-1/+1
* Teach the AArch64 backend about v4f16 and v8f16Oliver Stannard2014-08-271-0/+122
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